i.MX25 Errata on SDRAM

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i.MX25 Errata on SDRAM

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norishinozaki
Contributor V

Hello Igor,

ENGcm11876

ESDRAMC: Data corrupted during burst access across a page boundary of an 8-column SDRAM.

"This corruption is due to the fact that the ESDRAMC cannot perform a burst access across a row/page boundary. "

Projected Impact:

"SDRAM devices addressed with 8 columns, organized in 1M x 16 bit x 4 banks, cannot be used."

8 columns = 256 addresses and there are 4096 row addresses or pages in a 1M device.

The burst length is 8 and the size is 16bit x 8 =128bit.

How can this bursts across a row or page boundary?

Best regards,

Nori Shinozaki

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Yuri
NXP Employee
NXP Employee

Hello,

  The problem arises when start address of a SDRAM burst is not aligned

with burst size (is not multiple of burst size). In this case, on page boundary

the burst should be split into two accesses, and for 8-column SDRAM  data
may be corrupted.

Have a great day,
Yuri

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norishinozaki
Contributor V

Hello Yuri,

Thanks,  let me confirm.

For 8-column 1M x 16bit x 4bank, the size of 1 page is 2^8 * 16 = 4096 bit.

When the burst length is 16bit * 8 = 128bit.

Is this assumption correct?

You explained that depend upon the start address, the burst can across the page boundary.

Say 10-column addressing, 1 page size is 2^10 * 16 = 16,384 bit.

In this case, will 128bit burst size never across the page boundary?

Best regards,

Nori Shinozaki

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Yuri
NXP Employee
NXP Employee

Hello,

the problem takes place  just for 8-column DRAM parts. This

restriction should be considered as hardware issue for 8-column

parts. Basically page boundary may be acrossed for 10-column

devices too (without the issue), when start address is near the

boundary.

Regards,

Yuri.

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norishinozaki
Contributor V

Yuri,

Thanks, it's cleared!

Best regards,

Nori Shinozaki

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