i.MX and FPGA

[BharathiSubrama]

I am trying to find-out the suitable link in i.MX51 to interface with FPGA at 125Mbps data speed. If anybody experienced with this type of interface, plz throw some light on this.

[hanseunglee]

I also review interface for data trasfer from fpga. what interface do you select? 

[sidebranch]

Bharathi,

PCI Express SGDMA is ~200 MBytes/second with smallest payload, per lane. On small embedded SoCs, depending on the SoC we have measured 170 MBytes/second to 210 MBytes/second. Only few SoCs come with multiple lanes, such as the Freescale PowerPC P2022, which is a 4 lane SoC.

For i.MX5, if you need that kind of bandwidths to/from the FPGA, indeed you would have to (ab)use SATA or another high speed interface. i.MX6 brings PCIe connectivity.

If you need more info on Lancero specifically, contact me directly, I think this is off-topic here.

Regards,

Leon.

[ChrisPonder]

Do you want serial or can it be parallel? For serial you could use the SATA interface. Alternatively at 32-bit parallel that is only 3.9MBps which should be do-able with the slow ROM/SRAM interface.

[BharathiSubrama]

Thanks Leon. Any benchmarking experiment done on this interface, like what is max throughput and CPU load etc ..

[VladanJovanovic]

Other option that might be consider if you're only transferring data from FPGA to i.MX is to use the camera sensor input (CSI). This module is capable of high speed transfers and has own DMA capability (provided by IPU) for storing this data directly to memory.

[sidebranch]

Starting with i.MX6 which offers PCI Express ports, we offer the Lancero PCIe SGDMA solution to achieve high bandwidth to an Altera FPGA:

http://www.lancero.biz/

For simpler approaches, indeed attach the FPGA as an SRAM device on the external bus if it is available.

[Max1z]

Do you find any info about connect i.MX and FPGA? Can you share please?

[vudinhminh]

Sory! I am a HW guy, not SW...!
I have'n check thoughput in my design. Becuse i don't need hight thoughphut. But i think that your thoughput you need have must used RAW fimware not application level or a solution combine driver level and application! And i think you easy to do this if you used RAW firmware in ARM and used 32 bit bus with a fast SRAM IF in FPGA. Good looky!

 
Bharathi Subramanian said:

Thanks Minh. I assume EMI=EMIF. I am also moving in the same direction. By the way, Can you please share some info on raw and application level throughput achieved in your project?

[BharathiSubrama]

Thanks Minh. I assume EMI=EMIF. I am also moving in the same direction. By the way, Can you please share some info on raw and application level throughput achieved in your project?

[vudinhminh]

I develop a same device. My Arm connect FPGA by EMI of ARM.

But i used At91sam9260 not IMX...

You need connect FPGA to EMI of ARM used SRAM interface!

FPGA same SRAM momory of ARM. In ARM, you config EMI parameter at inint section of OS. In app you used mmap to communication with ARM! I hope some imformation can help you! Good lucky!