i.MX RT106x + IS25WP064D QSPI DDR mode...?

cancel
Showing results for 
Search instead for 
Did you mean: 

i.MX RT106x + IS25WP064D QSPI DDR mode...?

164 Views
np
Contributor II

Hi everyone,

Frustrated by SDR XIP performance, I've been trying to get my RT106x + IS25WP064D boards to run in DDR/DTR mode, but without success.

I've also tried using @jay_heng's NXP-MCUBootUtility, and looking at the Linux source code (issi.c doesn't have any DDR support), as well as 1000+ forum posts, but haven't found anything.

Am I trying to do something that's just impossible? Or is there a secret squirrel trick I've managed to miss?

Thanks, Nick

PS: my current best guess at the configuration options looks like this:

stFlashConfigOption.option0.U = 0;
stFlashConfigOption.option0.B.tag = 0xC;
stFlashConfigOption.option0.B.quad_mode_setting = kSerialNorQuadMode_StatusReg1_Bit6; // i.e. QE is bit 6
stFlashConfigOption.option0.B.max_freq = kFlexSpiSerialClk_80MHz;
stFlashConfigOption.option0.B.device_type = kSerialNorCfgOption_DeviceType_ReadSFDP_DDR;

My current best guess at the .memConfig looks like this:

.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_80MHz,
.controllerMiscOption = (1 << kFlexSpiMiscOffset_DdrModeEnable) | (1 << kFlexSpiMiscOffset_SafeConfigFreqEnable),
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xED, RADDR_DDR, FLEXSPI_4PAD, ADDRESS_BITS),
FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_4PAD, DUMMY_CYCLES, READ_DDR, FLEXSPI_4PAD, 0x04),
},

Labels (1)
Tags (4)
0 Kudos
7 Replies

72 Views
jay_heng
NXP Employee
NXP Employee

IS25WP064D chip supports up to 80MHz DTR, but FlexSPI can only support 66MHz DTR when internal dummy read strobe and loopbacked from DQS pad is selected, as there is no DQS pin in this Flash chip.

 

I have detail description in https://www.cnblogs.com/henjay724/p/14682888.html

0 Kudos

138 Views
np
Contributor II

Of course. DUMMY_CYCLES is currently 6.

I also tried it using 10 and 12, but that didn't help. At 80MHz DTR, I believe ISSI recommend using 6.

Also: ADDRESS_BITS is 24.

0 Kudos

156 Views
jay_heng
NXP Employee
NXP Employee

148 Views
np
Contributor II

Hi @jay_heng 

Unfortunately, that link gives me the error: "You do not have sufficient privileges for this resource or its parent to perform this action. Click your browser's Back button to continue."

Can you cut and paste the solution here, please?

Thanks very much & best regards, Nick

0 Kudos

141 Views
jay_heng
NXP Employee
NXP Employee

Can you please share DUMMY_CYCLES value with me?

0 Kudos

127 Views
np
Contributor II

Of course. DUMMY_CYCLES is currently 6.

I also tried it using 10 and 12, but that didn't help. At 80MHz DTR, I believe ISSI recommend using 6.

Also: ADDRESS_BITS is 24.

0 Kudos

114 Views
np
Contributor II

Ah. I think I understand what the problem is.

On the ISSI QSPI, the maximum SDR rate is 133MHz, but the maximum DDR/DTR rate is only 66MHz.

80MHz is the maximum speed for DDR/DTR supported by the RT106x, but the ISSI QSPI can only reach 66MHz.

So: anyone hoping to get better XIP performance on the ISSI QSPI by enabling DTR would seem to be wasting their time.

It appears that the only marginal performance gain available would be from enabling QPI mode. But even that doesn't seem likely to be worth the effort. Ouch!

0 Kudos