i.MX RT1060 Ref Manual GPIO config clarification please

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i.MX RT1060 Ref Manual GPIO config clarification please

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philipfreidin
Contributor II

In the i.MX RT1060 Processor Reference Manual  Rev 2, on page 958, there is a column titled "SRE / SPEED Setting".

The values given are 1, 2, and 3 bits long. In the actual register where these fields are used (for example page 698) the fields are not adjacent, and SPEED is to the left of SRE.

Could someone at NXP please provide 3 bit values for this column of table 12-3, and indicate which 2 bits are SPEED and which is SRE.

Thanks.

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Sabina_Bruce
NXP Employee
NXP Employee

Hello Philip,

Hope you are doing well.

The table you are referring to was made for easier reference when checking the speeds you reach, in regards to the settings configured. As you mentioned the actual register does not have them adjacent. Neither the DSE, SRE and Speed are in the order seen in the register. 

It is in ascending order first of DSE, then SRE (so this means the first four rows are when SRE = 0) and then Speed.

pastedImage_1.png

Best Regards,

Sabina

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1 Reply
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Sabina_Bruce
NXP Employee
NXP Employee

Hello Philip,

Hope you are doing well.

The table you are referring to was made for easier reference when checking the speeds you reach, in regards to the settings configured. As you mentioned the actual register does not have them adjacent. Neither the DSE, SRE and Speed are in the order seen in the register. 

It is in ascending order first of DSE, then SRE (so this means the first four rows are when SRE = 0) and then Speed.

pastedImage_1.png

Best Regards,

Sabina

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

----------------------------------------------------------------------------------------------------------------------- 

View solution in original post