Hello,
I'm plannning to use SPDIF RX on i.MX RT1060.
The plan is to input audio data through the SPDIF RX and output it to the SAI.
In this case, I am concerned about the quality of the I2S master clock generated from the SPDIF RX Clock.
We want to know the jitter figures because our products are about sound quality.
Can you tell me the Jitter value of SPDIF RX Clock?
:For example, the Texas Instruments PCM9211 has a Jitter of 50 ps, according to the manual.
What are some ways to reduce Jitter?
There is no manual pointing to this data. For a specific module, the jitter of the clock needs to be satisfied by an external device. For MCUs, it is only the choice of crystal that needs to satisfy the hardware design guide.
Please refer to this post to use SPDIF RX as source to SAI Mclk: Re: Clocking SAI1 from SPDIF on rt1052 - NXP Community
Best regards,
Omar
Thanks Omar,
By the way, Does the DPLL in the SPDIF Rx always output 128x the sampling freaquency clock?(e.g. 5,644,800 Hz at 44.1 kHz, and 12,288,000 Hz at 96 kHz)
I want a constant output clock from I2S.
Is there a way to output a constant clock (preferably 45158400Hz or 49152000khz) from I2S, regardless of the SPDIF sampling rate?