i.MX RT 1176 GPIO_SNVS_00 function

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i.MX RT 1176 GPIO_SNVS_00 function

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starwarrior
Contributor II

Hello, experts

I'm using the GPIO_SNVS_00 function of i.mx RT 1176 , but it sames that the GPIO functon did not work.

As there is a discription 'For GPIO13_IO3-GPIO13_IO12, GPIO functions are not available on devices that support tamper' in the datasheet.

So, could you please help check does the part number'PIMXRT1176DVMAA' support the GPIO_SNVS_00 function ? If yes , are there any other configs that this fucntion needs?

Best regards

Nick

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art
NXP Employee
NXP Employee

According to the latest Rev.1 Data Sheet documents for the i.MX RT117x parts,
only the MIMXRT1173CVM8A part has the Tamper functionality, so, the GPIO
functionality should be available on the GPIO_SNVS_00 - GPIO_SNVS_09 pads for
all i.MX RT1176 parts.

To use this functionality, you first have to select the correct IOMUX function
in the SW_MUX_CTL_PAD_GPIO_SNVS_00_DIG register, then enable and configure the
pad functionality in the SW_PAD_CTL_PAD_GPIO_SNVS_00_DIG register, and then
appropriately configure the GPIO functionality for the GPIO13_IO03 istance. For
details, please refer to the Sections 12.4.1.5, 12.4.1.21 and Chapter 13 of the
i.MX RT1170 Processor Reference Manual document, available on the processor's
Documentation web page:

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-...

Best Regards,

Artur

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starwarrior
Contributor II

Hello ,Artur 

Thanks for your reply. As my chip is a prototye sample. It seams that the sample is default to enable the tamper function. As I write the fuse 860H to 0000C000,  I can use the GPIO function.

Best regards

Nick 

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art
NXP Employee
NXP Employee

According to the latest Rev.1 Data Sheet documents for the i.MX RT117x parts,
only the MIMXRT1173CVM8A part has the Tamper functionality, so, the GPIO
functionality should be available on the GPIO_SNVS_00 - GPIO_SNVS_09 pads for
all i.MX RT1176 parts.

To use this functionality, you first have to select the correct IOMUX function
in the SW_MUX_CTL_PAD_GPIO_SNVS_00_DIG register, then enable and configure the
pad functionality in the SW_PAD_CTL_PAD_GPIO_SNVS_00_DIG register, and then
appropriately configure the GPIO functionality for the GPIO13_IO03 istance. For
details, please refer to the Sections 12.4.1.5, 12.4.1.21 and Chapter 13 of the
i.MX RT1170 Processor Reference Manual document, available on the processor's
Documentation web page:

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-...

Best Regards,

Artur

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