I have a question about the PowerOn sequence of the i.MX RT 1010.
The Hardware Development Guide has Figure 1. Power up and power down sequence.
Figure 1 does not show the maximum time for supplying DCDC_IN after supplying VDD_SNVS_IN and VDD_HIGH_IN.
Is there a time restriction between supplying VDD_SNVS_IN and VDD_HIGH_IN and supplying DCDC_IN?
i.MX-RT1010
