i.MX 93 ADC read using H/W trigger

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i.MX 93 ADC read using H/W trigger

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NZP
Contributor III

Hello experts,

I want to read IMX9352 processors ADC CH0 using external hardware trigger (gpio pin interrupt on rising edge at 1 Khz frequency) but looking at linux kernel driver this functionality is currently not available. So can anybody please let me know that what necessary changes do I require at driver level to read ADC using external hardware trigger.

Thanks.

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1,584 Views
NZP
Contributor III

Hi joanxie,

Thanks for reply.

have you tested failed? Haven't tested yet because not able to understand the flow for this implementation (I know about these register's) but doesn`t know how to assign trigger source to this ADC channel.  

which driver do you mention in Linux kernel iio/adc/imx93_adc.c

Can you please give some more information like how to assign particular gpio as a external trigger source to this ADC channel. 

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1,528 Views
joanxie
NXP TechSupport
NXP TechSupport

you can select by TRGMUX. depends on injection start trigger or normal start trigger you need

joanxie_0-1708580514841.png

different external trigger for SEL0 or SEL1, you can find the table as below

joanxie_1-1708580632075.pngjoanxie_2-1708580651912.png

 

1,466 Views
NZP
Contributor III

Hi joanxie,

Thank you very much for your support.

I am able to understand that we can select external trigger from SEL0 and SEL1 register. So, from the table attached by you, value Ah - is for GPIO1 which selects GPIO1 port as an ADC trigger source. 

So, my question is that,

1. How I can select/configure GPIO1.IO[0] (or any specific GPIO1 port's pin) as an ADC trigger source.

2. Here I am confused that GPIO1 is one port which has 0 to 15 number pins, so by configuring SEL register for GPIO1 which specific GPIO1's pin will be considered as an ADC trigger source.

Thanks.

 

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1,587 Views
joanxie
NXP TechSupport
NXP TechSupport

have you tested failed? which driver do you mention?refer to the RM,

By hardware trigger:

If external trigger is enabled (MCR[TRGEN] = 1), and an external trigger enable is detected, the conversion will start. The enable is checked only during the start of conversion. The hardware trigger needs to be active for a least 2 ADC bus clock cycles in order to recognized and start a conversion.

Detection of an active edge is defined by MCR[EDGE] (rising = 1, falling = 0). When an external trigger is recognized, MSR[NSTART] is set and normal conversion starts.