Hi
This is really minor, but a user asked us about thermal zones on i.MX 8MP and the behavior didn't make sense with what we had documented (adding cpu load makes thermal_zone1 raise faster than zone0, whereas according to the `type` file zone0 ought to be the cpu sensor)
Checking the reference manual, it seems to agree that zone0 is ANAMIX vs. zone1 cpu, so the DTS is probably wrong.
excerpt from the reference manual:
- The TMU has access to two temperature measurement sites located on the chip. The main probe is located inside of the ANAMIX, while the remote probe is located near the ARM core. The TMU monitors these sites and can signal an alarm if a programmed threshold is ever exceeded. The upper and lower temperature range is continuously captured. A set of reporting registers allow for reading the current temperature at monitored sites.
- also in TMU_TPS bits description we have "00 select the main probe only" // "01 select the remote probe(near A53) only", confirming index 0 = anamix and index1 = cpu (in TRITSR and other registers the description only says probe0 and probe1...)
While in dts cpu-thermal uses tmu 0 and soc-thermal uses tmu 1, which is the other way around.
The thresholds are identical so this has no impact in practice; this is just a head's up.
