i.MX 8M Nano secondary boot image on spi boot

[lelle]

Hello,

We’re planning implementation of having a fail-safe update mechanism for bootloader (u-boot) and would like to utilize the “Secondary image boot” feature. Our board boots from 4MB serial NOR over SPI (ECSPI1).

Bootloader is typically divided into two parts, SPL (loaded by CPU) and u-boot (loaded by SPL). The both parts are likely to be dependent on specific configuration of each other and should be updated as a pair.

This is difficult to achieve without knowing if we have booted using “Primary Image boot” or “secondary Image boot”.

Boot flow diagram of reference manual mentions an image index persistent bit.

Does the CPU BOOT ROM store this information in any register or is it possible to somehow find out?

Regards,

Lelle

[Sanket_Parekh · Accepted solution]

Hi @lelle ,

I hope you are doing well.

Information about persistent bits is removed and additional info is not made public in the latest version of RM as it is not required by users.

ROM sets PERSIST_SECONDARY_BOOT (SRC_GPR10[30]) bit to 1 if the primary boot image is corrupted or bad

It is required to fuse IMG_CNTN_SET1_OFFSET to support the secondary boot in i.MX8MN.

Please refer to 6.1.6.2 Secondary Image Boot in i.MX 8M Nano Applications Processor Reference Manual.

Thanks & Regards,

Sanket Parekh

[junya]

Hi @Sanket_Parekh ,

I have two questions.
∙ Is the PERSIST_SECONDARY_BOOT information also removed from the latest RM for i.mx8mp?

∙ If the boot device is a nandflash, does the primary boot fail if the u-boot area is not linear due to the presence of bad blocks?

Best regards,

sakemi

[lelle]

Hello,

Thank you, this is precisely what I'm looking for.

Regards,

lelle