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i.MX 8M Nano and DDR4-2400 supporting documentation

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i.MX 8M Nano and DDR4-2400 supporting documentation

‎07-13-2021 02:48 AM
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alexander4
Contributor I

Hello
I'm designing  i.MX 8M Nano and DDR4-2400 strongly following the IMX8MNHDG dev guide.

Is there any other documentation/guides/files that would be helpful for me?  

Required impedace for CLK and DQS signals , may be some layout checklists ?

Someting like HW_Design_Checking_List_for_i.MX6DQP6DQ6SDL_Rev3.1.xlsx

Also I have found one not critical mistake in  IMX8MNHDG . 


alexander4_0-1626168932393.png

vs

alexander4_1-1626168995064.png

 

Thank you!!!


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‎07-14-2021 06:32 AM
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alexander4
Contributor I

thanks!

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‎07-13-2021 04:11 AM
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igorpadykov
NXP Employee
NXP Employee

Hi Alexander

 

impedances are provided in sect.3.5 Trace impedance recommendations

i.MX 8M Nano Hardware Developer’s Guide

I am afraid there are no additional documents, in general recommended to use simulation,

sect.3.4.5 i.MX 8M Nano DDR SI simulation guide, ibis models can be found on

https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-proces...

 

Best regards
igor

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