i.MX 8M Mini MIPI-DSI synchronous clock?

[ishiyakazuo]

Hi,

We're running into an issue where we're trying to create a design with the MIPI-DSI output where either the pixel clock is sent separately, or the D-PHY HS clock is required to be an exact multiple of the pixel clock being transmitted.  Are either of these possible with the i.MX 8M Mini?  If so, is there documentation that describes how to configure this?

Thanks in advance for any help!

[art]

No, there is no way to implement any of the cases you describe on i.MX8MMini.

Best Regards,
Artur

[ishiyakazuo]

Even if both the MIPI D-PHY PLL and the video pixel clock PLL are fed from the same clock source in the CMM's clock root selections?

We can be fairly flexible about the relationship of the MIPI HS clock and the pixel clock, but we just want to know if there's a way to make them at least somewhat related, such that, with some known multiplier/divider, the MIPI clock can be the pixel clock without clock dithering.

[art]

Besides the video data, the MIPI DSI flow translates some data/tag packets, so, the MIPI DSI clock cannot be exactly equal to pixel clock.

[ishiyakazuo]

But that's not what I'm asking -- I'm asking if the two clocks can be synchronous and related, not exactly the same.  I don't really care much if the MIPI D-PHY clock is the pixel clock or 1.5x or double the pixel clock, but I'm asking if they can have a known relationship via some settings.

[art]

No, it is not possible to establish a known relation between the pixel clock and MIPI data clock on the i.MX8MMini MIPI DSI PHY.