i.MX 8M Mini MIPI-DSI RGB565 panel

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i.MX 8M Mini MIPI-DSI RGB565 panel

1,433件の閲覧回数
francisdepaemel
Contributor I

We are trying to drive a RGB565 mipi display

Another RGB888 display is working fine
dsi->format = MIPI_DSI_FMT_RGB888;

But for RGB565
dsi->format = MIPI_DSI_FMT_RGB565;
we can't to get it working correct.

When measuring the mipi lane, we see that a line lenght is shorter for RGB565 then RGB888. So it seems that the RGB565 is taken.
But when filling the framebuffer with 0xFF, and measuring the data lane, we something like 0xFC so a few bits are put to zero.

In logging we see lcdif_set_pix_fmt being called with DRM_FORMAT_XRGB8888. And looking at the code, we think the conversion form 888 to 565 should be ok.

		/* bpp 32 */
	case DRM_FORMAT_ARGB8888:
	case DRM_FORMAT_XRGB8888:
	case DRM_FORMAT_ABGR8888:
	case DRM_FORMAT_XBGR8888:
	case DRM_FORMAT_RGBA8888:
	case DRM_FORMAT_RGBX8888:
		/*Data format */
		printk(KERN_WARNING "%s DRM_FORMAT_ARGB8888\n", __func__);
		ctrl &= ~CTRL_DF24;
		ctrl |= CTRL_SET_WORD_LENGTH(3);

		if (format == DRM_FORMAT_RGBA8888 ||
		    format == DRM_FORMAT_RGBX8888)
			ctrl |= CTRL_SHIFT_DIR(1) | CTRL_SHIFT_NUM(8);

		/* Byte packing */
		ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0x7);

		/* 'BGR' order */
		if (format == DRM_FORMAT_ABGR8888 ||
		    format == DRM_FORMAT_XBGR8888)
			writel(CTRL2_ODD_LINE_PATTERN(0x5) |
			       CTRL2_EVEN_LINE_PATTERN(0x5),
			       lcdif->base + LCDIF_CTRL2 + REG_SET);

		break;


Any pointers would be great

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igorpadykov
NXP Employee
NXP Employee

Hi francisdepaemel

 

one can use rm67191 example:

https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8mm-evk-r...

in driver rad_panel_probe() function change dsi->format = MIPI_DSI_FMT_RGB888;

to MIPI_DSI_FMT_RGB565;
and change necessary custom lcd initialization in struct cmd_set_entry manufacturer_cmd_set[]

and timings drm_display_mode default_mode = {..}

https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/gpu/drm/panel/panel-raydium-rm6719...

 

Best regards
igor

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francisdepaemel
Contributor I

Igor,

Thanks for the pointers.

We checked this with our code and seems that we did the same adjustments. But still the MIPI data is wrong.

We have checked that the data type on the mipi lane is 0x0E ( for RGB565) and 0x3D (for RGB888) so it seems that the IMX knows we want to send RGB565.

To test, we have pushed all 1's in our framebuffer. But if we look at the data on the MIPI lane, we see all 1's in RGB888 mode, but in RGB565 this is not the case and a few bits are 0. So we are puzzled with this behaviour.

Any thoughts about what or why bits could become 0 before send by the DSI?

Linux kernel is 4.14.98

Thanks,

Francis

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igorpadykov
NXP Employee
NXP Employee

Hi Francis

 

may be suggested to try latest kernels as L4.14.98 is not supported as outdated.

https://www.nxp.com/design/software/embedded-software/i-mx-software/embedded-linux-for-i-mx-applicat...

 

Best regards
igor

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