i.MX 8M Dual/8M QuadLite/8M Quad Incorrect PCIE Supply Configuration

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i.MX 8M Dual/8M QuadLite/8M Quad Incorrect PCIE Supply Configuration

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pierluigi_p
Contributor IV

Hi All,

following the article

    https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Dual-8M-QuadLite-8M-Quad-Incorre...

when PCIE_VPH operates at 3.3V but the PCIE is disabled in the device tree, the kernel driver is not even loaded, so the changes from MLK-25349 have no effects, correct ?

Does this condition potentially leads to PCIe PHY overstress ?

Thanks

Regards

Pier

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

>>when PCIE_VPH operates at 3.3V but the PCIE is disabled in the device tree, the kernel driver is not even loaded, so the changes from MLK-25349 have no effects, correct ?

No, we can't understand it like this. 

You mean that you don't use PCIe interface , But you should remove 3.3V from VPH pin . Because the core issue discussed in this article is VPH=3.3V, and the purpose of patch is to enable 1.8V regulator.

 

Have a good day!

Regards,

weidong

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