i.MX 6UltraLite 25 MHz Reference Clock

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i.MX 6UltraLite 25 MHz Reference Clock

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jamesk1
Contributor I

The reference manual for the i.MX 6UltraLite on page 872 in the  ENET1 External Signals section says there is a 25 MHz Reference Clock on GPIO1_IO03 ALT2.

In the 

"SW_MUX_CTL_PAD_GPIO1_IO03 SW MUX Control Register"

ALT 2 is not the REF CLK

There in the 25Mhz Ref CLK in 

"SW_MUX_CTL_PAD_GPIO1_IO02 SW MUX Control Register"

ALT 3

Could you please clarify what pin i can generate a 25Mhz clock for my ENET PHY

Thanks 

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Carlos_Musich
NXP Employee
NXP Employee

Hi James,

you are right, the manual does not match, but you can see inside kernel files (Kernel/arch/arm/boot/dts/imx6ul-pinfunc.h) that there are 2 available MXUL_PAD_xxx macros for ENET1_REF_CLK_25M and these are the ones you can use and trust.


Best regards,
Carlos

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Carlos_Musich
NXP Employee
NXP Employee

Hi James,

you are right, the manual does not match, but you can see inside kernel files (Kernel/arch/arm/boot/dts/imx6ul-pinfunc.h) that there are 2 available MXUL_PAD_xxx macros for ENET1_REF_CLK_25M and these are the ones you can use and trust.


Best regards,
Carlos

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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