how to config imx233 work with 8k page nand flash (hynix H27UAG8T2B)?

[jianghongri]

we are work on imx233, it is good to work with bootup from SD card.

now we have changed hardware design, have to work with nand flash.

someone can help me "how to config imx233 work with 8k page nand flash (hynix H27UAG8T2B)?",

thanks very much

[YixingKong]

jianghongri and Qiang_FSL, this is great discussion. I like it. Thanks, and keep going. karinavalencia, Deactivated user

[qiang_li-mpu_se]

Attached is an example to support a new 4KB page NAND H27UAG8T2ATR for iMX233 based on the L2.6.31_09.12.00_SDK_source.tar.gz BSP. You can reference to it  to add your new NAND support in BSP.

"linux_NAND_H27UAG8T2ATR_support_0912.patch" is the BSP patch.

"Kobs_NAND_H27UAG8T2ATR_support_0912.patch" is the kobs-ng patch for MFGTool.

[jianghongri]

Very thanks QiangLi.

I have tested work good with 4K page size nand support.

However, the manual said that the ECC hardware of imx233 support 4K page size nand.

I am worried that  the rom chip in IMX233 itself does not support bootup from 8k page size nand.

So in the end could not be loaded 8k page size nand.

If anyone have successful use 8K page size nand experience, please share with me.

tks very much!

[qiang_li-mpu_se]

I  think the BCH and GPMI on iMX233 can support the 8KB page size NAND, because the boot ROM will read the page size from FCB, so it can handle the 8K page case, maybe you can re-work your board and have a try with the 8KB page size NAND.

[jianghongri]

Thanks QiangLi very much.

Today, I have solved the kernel support 8K page size nand flash, I've also modify kobs to add 8k page size nand flash nand flash support, but IMX233 can not boot the system from flash and occurred error code 0x80501003.

I have follow questions.

1. if Boot rom of IMX233 doesn't support the work with 8K page size nand flash?

2. or NCB of imx233 is not configured correctly, how to configure?

[qiang_li-mpu_se]

    The error code 0x80501003 means the boot ROM has's found the correct m_u32Fingerprint1 in NCB. Maybe the kobs-ng and boot ROM had used different method to access the NAND.

    By the way, if you boot the iMX233 board from SD card, will your 8KB nand driver work correctly? Had you dumped the NCB raw data to check?

[iemdey]

I am working with iMX233 and have the same problem. Boot from the SD card, i  can dump the NCB raw data.

The dumped raw data of NCB is very similar to jianghongri's last post attachment. Is his NCB raw data correct?

[qiang_li-mpu_se]

I double checked the error 0x80501003, this error should appears after NCB was found but failed to load the power_prep, maybe you had burned the wrong sb file to the board. For example, if I burn the imx23_uboot.sb to IVT board, I can see the same issue. After change file to imx23_uboot_ivt.sb, it is OK.

[iemdey]

I checked my sb file, burn it to SD card and the board boot correctly. So, i think the boot ROM do not read the correct data from nand flash.  I am confused by several parameters of the NCB:

  m_u32SectorInPageMask = 3

  m_u32SectorToPageShift = 1

  m_u32NumRowBytes = 3

  m_u32NumColumnBytes = 2

What is the exact meaning of these parameters? Are the value of these parameters correct for 8k page size nand flash?

[qiang_li-mpu_se]

uint32_t m_u32TotalPageSize; //!< 2112 for 2K pages, 4314 for 4K pages.

uint32_t m_u32SectorsPerBlock; //!< Number of 2K sections per block.

uint32_t m_u32SectorInPageMask; //!< Mask for handling pages > 2K.

uint32_t m_u32SectorToPageShift; //!< Address shift for handling pages > 2K.

uint32_t m_u32NumberOfNANDs; //!< Total Number of NANDs - not used by ROM.

uint32_t m_u32NumRowBytes; //!< Number of row bytes in read/write transactions.

uint32_t m_u32NumColumnBytes; //!< Number of Column bytes in read/write transactions.

 
Sector size in boot ROM is 2KB, so m_u32SectorInPageMask=3 should be OK for 8KB page size NAND, but m_u32SectorToPageShift I think it should be 2, because each page has 4 sectors.

m_u32NumRowBytes = 3 and m_u32NumColumnBytes = 2 should be OK from the NAND datasheet.

[iemdey]

Thanks for your help!

I tried to set m_u32SectorToPageShift=2, but it give a error code 0x80508008(NAND DMA timed out) when boot the board.

[qiang_li-mpu_se]

    Did you update the NAND driver and the kobs-ng for the 8KB page size NAND. From your log, I found the followed information for NAND which is wrong:

NFC Geometry

  ECC Algorithm          : BCH

  ECC Strength           : 20

  Page Size in Bytes     : 8832

  Metadata Size in Bytes : 10

  ECC Chunk Size in Bytes: 512

  ECC Chunk Count        : 16

  Payload Size in Bytes  : 8192

    But from the NAND datesheet, the page size should be 8192+448 = 8640.

    And in "kobs-ng-11.09.01\src\mtd.c", function mtd_open(), the default code doesn't support 8192+448 case (You should add the 8192+448 case into it):

  /* verify it's a supported geometry */

  if (miu->writesize + miu->oobsize != 2048 + 64 &&

   miu->writesize + miu->oobsize != 4096 + 128 &&

   miu->writesize + miu->oobsize != 4096 + 224 &&

   miu->writesize + miu->oobsize != 4096 + 218 &&

   miu->writesize + miu->oobsize != 8192 + 376 &&

   miu->writesize + miu->oobsize != 8192 + 512) {

   fprintf(stderr, "mtd: device %s; unsupported geometry (%d/%d)\n",

     mp->name, miu->writesize, miu->oobsize);

   goto out;

  }

    In "kobs-ng-11.09.01\src\mtd.c", function v0_rom_mtd_init(), it only support 2K and 4K page size, we can add the 8K case as followed:

} else if (mtd_writesize(md) == 8192) {

  ncb->NCB_Block1.m_u32SectorsPerBlock          = (mtd_erasesize(md) / mtd_writesize(md)) * 4;

  ncb->NCB_Block1.m_u32SectorInPageMask         = 3;

  ncb->NCB_Block1.m_u32SectorToPageShift        = 2;

  ncb->NCB_Block2.m_u32EccBlock0Size            = 512;

  ncb->NCB_Block2.m_u32EccBlockNSize       = 512;

  ncb->NCB_Block2.m_u32NumEccBlocksPerPage      = (mtd_writesize(md) / 512) - 1;

  ncb->NCB_Block2.m_u32MetadataBytes            = 10;

  if (mtd_oobsize(md) == 512) {

   ncb->NCB_Block2.m_u32ECCType           = BCH_Ecc_20bit;

   ncb->NCB_Block2.m_u32EccBlock0EccLevel = BCH_Ecc_20bit;

  }  else if ((mtd_oobsize(md) == 448)){

   ncb->NCB_Block2.m_u32ECCType           = BCH_Ecc_16bit;

   ncb->NCB_Block2.m_u32EccBlock0EccLevel = BCH_Ecc_16bit;

  }  else if ((mtd_oobsize(md) == 376)){

   ncb->NCB_Block2.m_u32ECCType           = BCH_Ecc_12bit;

   ncb->NCB_Block2.m_u32EccBlock0EccLevel = BCH_Ecc_12bit;

} else {

    By the way, did you tested your NAND driver with SD boot image? For example read/write and verify the data on NAND partition. If the Kernel driver can work fine, that means the iMX23 GPMI and BCH can support this NAND well, so boot ROM can support it too.

    For the error 0x80508008(NAND DMA timed out), if the BCH hardware can't support 8KB page size, for example, it can only transfer 4KB data once, but the boot ROM code asked for 8KB data for this case, then there will be DMA timeout error. But for such issue, I think you will also get it in Linux kernel driver. That's why I suggest you to test your NAND kernel driver first.

[qiang_li-mpu_se]

    By the way, for this 8KB page size of NAND, since it has 448 bytes spare data, it can only suppory 16bits ECC for each 512 bytes data. If you set it to 20 bits ECC (I found this error setting from your log), spare space will be not enough.

[kewl]

@@@ "By the way, for this 8KB page size of NAND, since it has 448 bytes spare data, it can only suppory 16bits ECC for each 512 bytes data. If you set it to 20 bits ECC (I found this error setting from your log), spare space will be not enough."

@@@

Hi Qiang Li,

How to calculate how many bits ECC for each 512 bytes that it can support? How do you come to conclusion that 16 bits is the max for this case? Can you explain or share some documentation?

Thanks.

[qiang_li-mpu_se · Accepted solution]

    To calculate the ECC bits, you can reference to iMX23 reference manual, Chapter 15.2.3 Determining the ECC layout for a device.

    The simple calculation method is: (Total page spare data bits) / 13 / (sectors per page) = ECC bits per sectors. (The Sector size is always 512 bytes for BCH)

    For this 8KB page size NAND, its page spare size is 448 bytes, and 10 bytes will be reserved as meta data. So "Total page spare data bits" = (Page spare size - meta data size) * (bits per byte) = (448-10) * 8 = 3504. So the ECC capability = 3504 / 13 / (sectors per page) = 3504/13/(8KB/512) = 3504/13//16 = 16.846.

     From calculation, for this NAND, the iMX23 can support 16 bits ECC per 512 bytes.

[PotatoChip]

I have exactly same problem. I get 0x80508003 error instead. I wonder if you can give me some advise.