fixed 32kHz clock in i.MX28 and system timer

[RoboTech]

The reference manual (p.846 - under 10.2.1) says:

Fixed 32 KHz clock domain. The reference is the 24 MHz crystal and divides by

768 to produce 32 KHz.

Now that can't be right:

24000000 / 768 = 31250

So, either the clock is 31.250kHz or it is 32.000kHz

The kernel source file arch/arm/mach-mx28/clock.c does the following:

static unsigned long clk_32k_get_rate(struct clk *clk)

{

    return clk->parent->get_rate(clk->parent) / 750;

}

So it seems that clk_32k is actually 32kHz. Is that correct? Who's right, the manual or the source?

Another inconsistency I found is in the source file arch/arm/plat-mxs/timer-nomatch.c in the function mxs_nomatch_timer_init():

    /* configure them */

    __raw_writel(

        (8 << BP_TIMROT_TIMCTRLn_SELECT) |  /* 32 kHz */

        BM_TIMROT_TIMCTRLn_RELOAD |

        BM_TIMROT_TIMCTRLn_UPDATE |

        BM_TIMROT_TIMCTRLn_IRQ_EN,

            online_timer->base + HW_TIMROT_TIMCTRLn(0));

    __raw_writel(

        (8 << BP_TIMROT_TIMCTRLn_SELECT) |  /* 32 kHz */

        BM_TIMROT_TIMCTRLn_RELOAD |

        BM_TIMROT_TIMCTRLn_UPDATE |

        BM_TIMROT_TIMCTRLn_IRQ_EN,

            online_timer->base + HW_TIMROT_TIMCTRLn(1));

There the comments suggest that the clock source selected is the 32kHz fixed clock, but that should be a value of 11 (0xB) and not 8 (that means clock source is the PWM7 input).

I am wondering if this is the configuration of the system timer, that is used by the kernel scheduler. In that case I can't figure out how it can actually work.

I am saying that because the following two lines of code read as:

    __raw_writel(clk_get_rate(timer->clk) / HZ - 1,

            online_timer->base + HW_TIMROT_TIMCOUNTn(0));

    __raw_writel(0xFFFF, online_timer->base + HW_TIMROT_TIMCOUNTn(1));

Where the timer TIM0 seems to be setup for counting at HZ frequency, which is defined as CONFIG_HZ and contains the system timer rate.

So the question is: Is that the system timer? And is that configured correctly for a 32kHz clock source?

[gusarambula]

On table 10-1 (System Clocks) of the Reference Manual there is a mistake and it should read “Fixed 32 KHz clock domain. The reference is the 24 MHz crystal and divides by 750 to produce 32 KHz.” This divider is shown correctly on Figure 10-1 (Logical Diagram of Clock Domains)

I’ll look into the code you are mentioning on the i.MX28 as I found a similar file but it reads “System timer for Freescale STMP37XX/STMP378X” on the comments of the file. Could you confirm in the meantime if it is the same file you have?