enable CLKO2 for 24MHz output clock on iMX8MN

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enable CLKO2 for 24MHz output clock on iMX8MN

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wouher
Contributor II

Hello,

On the iMX8M Nano I want to enable a 24MHz output clock on pin GPIO1_IO15.

When tested in U-Boot, this works as expected. Only the definition of MX8MN_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 is needed in the device tree, and the 24MHz clock is generated on the pin.

However, if I then boot Linux, this clock output is disabled during kernel startup. I don't understand why, because also in the Linux device tree, I define MX8MN_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2.
Also when I read the register IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO15 from Linux, it says that it is configured for MUX_MODE of CCM_CLKO2, which is what I expect.
But as said, the clock is not on the output anymore.

Is there something I am forgetting (e.g. another device tree setting) which would disable the clock output on the pin, even though in Linux the IOMUXC_SW_MUX_CTL_PAD says it's configured correctly, and it was running in the U-Boot stage?

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igorpadykov
NXP TechSupport
NXP TechSupport

team suggested attached patch (works for CLKO1 on GPIO1_14, same with CLKO2 on GPIO1_15).

 

Best regards
igor

 

 

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Wouter

 

from team:

------------

What's the BSP version? Could this reproduce on i.MX8M Nano DDR4/LPDDR4 EVK?

Any conflict about this pin in dts?

------------

 

Best regards
igor

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wouher
Contributor II

Hi Igor,

The BSP version is 5.4.24_2.1.0.
In my Linux .dts I have removed all other entries except debug UART and USB, so a pin conflict seems unlikely to come from the dts.

When in the U-Boot stage the following command is enough to enable the 24M clock on GPIO1_IO15:
mw 0x30330064 0x6

The 24M clock is disabled when starting Linux, reading 0x30330064 in Linux still gives 0x6.
I have a Nano EVK but it looks there will be no comparable pin on J1003 to test this on, I'll see if I can find an alternative.

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wouher
Contributor II

I was able to reproduce this on the Nano EVK when using CLKO1 on GPIO1_IO14, which is connected to pin B8 of J802, the CSI MIPI connector which I'm able to probe.

Also here I see the desired behavior in U-Boot, a 24M clock which I can enable through mw 0x30330060 0x6.

When starting Linux, the clock disappears while the pinmux still says CLKO1. Since this seems correct, it looks like the clock itself is not enabled anymore, but I can't explain this.

Could you please check with your team for input?

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igorpadykov
NXP TechSupport
NXP TechSupport

>Could you please check with your team for input?

 

below answer from team:

-----------------------------

Cause CLKO1/2 may only output 24Mhz when the module(who defines the pin) is working.

E.g.CLKO1 on GPIO1_IO14, it is defined in ov5640 sensor node.

And when ov5640 is capturing the stream, the CLKO1 outputs 24Mhz.

You can try following command if you connect the ov5640 to the csi port:

gst-launch-1.0 -v v4l2src device=/dev/video0 ! "video/x-raw,format=YUY2,width=1920,height=1080" ! queue ! fakesink

------------------------------

Best regards
igor

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wouher
Contributor II

I expected that a method such as that would produce the clock output, but it should be possible to create the clock output without creating a dependency to some stream, correct?

Because in U-Boot I do not define any other modules and can still produce a clock output.

Isn't there a syntax in the Linux device tree as well which would enable the 24M output without any stream dependency, just as in U-Boot? On our product this will simply be used an input clock for another piece of hardware, not audio/video related.

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igorpadykov
NXP TechSupport
NXP TechSupport

team suggested attached patch (works for CLKO1 on GPIO1_14, same with CLKO2 on GPIO1_15).

 

Best regards
igor

 

 

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wouher
Contributor II

Thanks very much, that's what I was looking for

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