We have a custom board based on IMX8MM EVK DDR4 Board. We have connected an 4GB eMMC to it.
The eMMC fails to initialize in u-boot at CMD8.
error log with eMMC Debug messages enabled:
u-boot=>
u-boot=>
u-boot=>
u-boot=> mmc dev 2
mmc@30b60000: No vmmc supply
mmc@30b60000: No vqmmc supply
mmc_get_op_cond [2823]
clock is disabled (0Hz)
mmc_power_cycle [2785] ret 0
mmc_power_cycle [2790] ret 0
mmc_power_on [2760] Cannot control power
mmc_set_signal_voltage [1682] signal_voltage 4
mmc_set_signal_voltage [1684] err 0
selecting mode MMC legacy (freq : 0 MHz)
clock is enabled (400000Hz)
CMD_SEND:0
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_NONE
CMD_SEND:8
ARG 0x000001aa
esdhc_send_cmd_common - 487 USDHC
RET -110
mmc_send_if_cond [2680] err -110
CMD_SEND:55
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
RET -110
mmc_get_op_cond [2868] err -110
CMD_SEND:0
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_NONE
CMD_SEND:1
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R3,4 0x00ff8080
mmc_send_op_cond [677] err 0
CMD_SEND:1
ARG 0x40300000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R3,4 0x00ff8080
mmc_send_op_cond [677] err 0
CMD_SEND:0
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_NONE
CMD_SEND:1
ARG 0x40300000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R3,4 0x00ff8080
mmc_complete_op_cond [707] err 0
CMD_SEND:1
ARG 0x40300000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R3,4 0xc0ff8080
mmc_complete_op_cond [707] err 0
mmc_complete_op_cond [712] err 0
CMD_SEND:2
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R2 0x11010030
0x30344741
0x30029a2d
0xd21f2700
DUMPING DATA
000 - 11 01 00 30
004 - 30 34 47 41
008 - 30 02 9a 2d
012 - d2 1f 27 00
CMD_SEND:3
ARG 0x00010000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R1,5,6,7 0x00000500
CMD_SEND:9
ARG 0x00010000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R2 0xd05e0032
0x0f5903ff
0xffffffe7
0x92400000
DUMPING DATA
000 - d0 5e 00 32
004 - 0f 59 03 ff
008 - ff ff ff e7
012 - 92 40 00 00
mmc_startup [2500] version 4
version 1074003968
selecting mode MMC legacy (freq : 25 MHz)
CMD_SEND:7
ARG 0x00010000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R1,5,6,7 0x00000700
mmc_send_status:: 219
mmc_send_status:: 224
CMD_SEND:13
ARG 0x00010000
esdhc_send_cmd_common - 487 USDHC
MMC_RSP_R1,5,6,7 0x00000900
mmc_send_status:: 226 - err 0
mmc_send_status:: 228
CURR STATE:4
mmc_send_status:: 230
status = 0x900
CMD_SEND:8
ARG 0x00000000
esdhc_send_cmd_common - 487 USDHC
RET -70
mmc_init: -70, time 268
u-boot=>
u-boot=>
u-boot=>
The eMMC schematic and device tree node is attached below:
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
>;
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
};
Pls suggest possible solution to the same.
Thanks for the support.
Regards,
Nishad
