dts of GPIO1 using pins for IMX Tool on i.MX7d

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dts of GPIO1 using pins for IMX Tool on i.MX7d

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Contributor I

Hi,
I'm using Pins for IMX Tool to configure pins on i.MX7d.

In the generated dtsi, pins GPIO1_IO00 to GPIO1_IO07 are located in "iomuxc" group.

I have understood that these pins "iomuxc_lpsr"...
Is it correct ?
If yes, how tell the tool to do it correctly ?

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NXP Employee
NXP Employee

Hello,

I do not know if I understood you correctly. However, if you want to use the i.MX Pins tool to configure the GPIO1_IO00 to GPIO1_IO07 as a GPIO. You just need to select the Pin name and in the sub-menu that appears. Select the option to be used as GPIO.

It is named LPSR because those are the GPIO´s used to wake up the i.MX when is in this mode. When LPSR mode is not needed for the application, the VDD_LPSR can be connected to VDDA_1P8 and NVCC_GPIO1/2 can be connected to the same power supply as NVCC_XXX for other GPIO banks.

Best regards,

Diego.

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Contributor I

Hello Diego,

In fact, if I look in imx7d-sdb.dts, the declaration of GPIO1_IO05 is done like this :

&iomuxc_lpsr {
    pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_hog_2 &pinctrl_usbotg2_pwr_2>;
    imx7d-sdb {
        pinctrl_hog_2: hoggrp-2 {
        fsl,pins = <
            MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14
        >;
    };
...

If I do the same using the i.MX Pins tool, I have something like that :

&iomuxc {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_foo>;

    imx7d-board {

        pinctrl_foo: pinctrl_foogrp {
        fsl,pins = <
            MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x00000014
        >;
    };

As you can see, this gpio is declared in the ioxmuxc_lpsr group while the tool declare it in the iomuxc group...

I had understand that the first 8 pins from GPIO1 are only controled by LSPR controler even if you want to use it as standard gpio.

Is it true ?

Best regards,

Olivier.

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NXP Employee
NXP Employee

Hello,

The GPIOs are controlled according to how you configured the device tree.

According to the device tree of our SareSD board. When you the board entres into de LPSR mode, the muxing will change depending on the configuration of the device tree:

&iomuxc_lpsr { 
  pinctrl-names = "default"; 
  pinctrl-0 = <&pinctrl_hog_2 &pinctrl_usbotg2_pwr_2>; 
  
  imx7d-sdb { 
      pinctrl_hog_2: hoggrp-2 { 
          fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 >; 
      };
 
      pinctrl_pwm1: pwm1grp { 
          fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x30 >; 
      }; 

      pinctrl_usbotg2_pwr_2: usbotg2-2 { 
          fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 >; 
      }; 

      pinctrl_enet2_epdc0_en: enet2_epdc0_grp { 
          fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x80000000 >; 
      }; 

      pinctrl_sai3_mclk: sai3grp_mclk { 
          fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO03__SAI3_MCLK 0x1f >; 
      }; 
  }; 
};

In the case of the pins tool. Probably, you are not configuring the LPSR mode of the board. That is why you are not seeing it in the iomux_lpsr group.

Hope I made me understand.

Best regards,

Diego.

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Contributor I

Hello,

My problem is not the working mode of the gpio but where the "fsl,pins" description is done inside the dts...

In many examples, it is a child of "iomuxc_lpsr"...

In documentations, GPIO1[7..0] of i.MX7d are controled by "IOMUXC LPSR" controler (ie iomuxc_lpsr group in the dts)...

But, when I use pins tool, "fsl,pins" descriptions are all childs of "iomuxc" !!!

So, I don't understand how iomuxc driver will do to drive pins controled by "IOMUXC LPSR"...

In addition, if I look if the declaration of "fsl,imx7d-iomuxc" (cf pinctrl-imx7d.c), GPIO1[7..0] pins are not listed by imx7d_pinctrl_pads (cf inctrl-imx7d.c).

 

Best regards,

Olivier.

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NXP Employee
NXP Employee

Hello,

I apologize for the delay.

What I was trying to say, is that our device tree and what the pins tool are different. Even both files dose not share the header's files. In this case, the pins tool is only programing the GPIOs to be muxed as GPIOs. But what our device tree does is assign those GPIOs to be used with the LPSR driver.

Hope I made me understand this time.

Best regards,

Diego.

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Contributor I

Hello,

Ok, I don't make a good usage of your tool... So I will find another solution !!

Thanks you Diego.

Best regards,

Olivier

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