change peripheral root clock from osc_24 to sys_pll2

[ababatola]

Hello,

I am working on current reduction for my custom imx8mp linux board and I would like to disable the PLL2 for this.  I have read the applicaiton report AN13400 and after implmenting the dram_detection and disbaling the PLL2, I did not observe any reduction in current.

From my linux clock configuration, I observed that most of the clocks are on either on sys_ppl1 or osc_24m.  I would like to move some of the periperal clocks to the sys_pll2 (especially from osc_24m).  

I have carefully looked at the clk-imx8mp.c and the device tree to see if i can implement this.  But I could not find a way to do this.

How can this be done.  A copy of my clock configuration and patch file is enclosed.

Thanks

[Bio_TICFSL]

Hello,

Which verson of yocto are you using, since with the appnote AN13400 and yocto version 5.15.71 is works, You can disable PLLs in this way:
In default SDK release’s demos, several PLLs are used, for example, SYSPLL1 for
the M core, SYSPLL2 for UART, audio PLLs are enabled. In a low-power application,
to use fewer PLLs, use SYSPLL1 for the M core, UART, and disable other PLLs. In
the low-power demo of this paper, a 24 MHz crystal is used as the clock source for
the M core and UART. In this way, all PLLs can be disabled in the ATF code.

Regards

[ababatola]

hi @Bio_TICFSL ,

Have you been able to look at my further questions and needed explanations.

I would greatly appreciate your reply.

Thanks

[ababatola]

Hi,

Thank you for your reply.

I am using kernel version 5.4.70 and buildroot as the build system.

As indicated in my last message, I want to change some peripheral from sys_pll1 to sys_pll2.   How can this be done? 

I have some questions relating to the application note An13400.

1.  In section 5.5.2, which .c source file should the piece of code be written.   The source file name is not indicated in the document.

2. Is patching the imx8m_psci_common.c the correct place to put the ATF optimisation code which are in sections 5.5.4 and 5.55

3.  In which source file should the codes in section 5.5.6 be placed.

4.  In section 5.4 U-Boot optimization, I impemented this.  I want to ask if there is way to observe this when the kernel is running.  I used the 

                      cat /sys/kernel/debug/clk/clk_summary

to view the clocks but I did not observe any changes in the clock that could be related to the code changes.

5.  The "NOTICE(.....)" function or macro; what is it used for and if for logging, where can I find the messages.

I would like to ask if you did a reveiw of the enclosed patch in my question.

Thanks alot!

[ababatola]

Hello,

I would like to ask when I can get some reply and input to the problems raised.

Thanks.

[ababatola]

Hi,

good morning.

I would like to modify the question to moving some peripheral clock form sys_pll1 to sys_pll2 and not from osc_24m to sys_pll2.  This is because the sys_pll1 must alway be working as I need a high speed clock for the core M7 to keep working while the linux core is in sleep state.

Thanks