Work arounds for IPU Lockup on i.MX6?

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Work arounds for IPU Lockup on i.MX6?

Contributor III

I've got a Linux application that uses the IPU for video processing on an i.MX6, based on the IPU examples. The application submits tasks through the /dev/mxc_ipu interface from multiple threads: these include overlay, colour space conversion, and deinterlace operations.There are about 125 IPU operations per second. I set the timeout field on each operation to 10000ms, to ensure that no natural timeouts occur. I'm using a single LVDS display.

After what seems to be a random interval, often about an hour, the application will crash. The symptoms are:

  1. All calls to IPU_QUEUE_TASK will fail with ETIMEDOUT.
  2. The kernel log will fill with "imx-ipuv3 imx-ipuv3.0: warning: disable ipu dma channel 14 during its busy state"
  3. A kernel thread [ipu2_task] or [ipu1_task] will be constantly consuming 95% CPU.

At this point the system is unresponsive, and has to be rebooted.

Any suggestions?

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3 Replies

Contributor III

I've built the kernel in debug mode, and added a BUG() statement to stop the infinite loop. Does anybody have any idea from this IPU register dump?

imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_10 = 0x40000000

imx-ipuv3 imx-ipuv3.0: ERR:[0xba327000]-no:0x24854e0 "wait_for_comp_timeout" ret:0,line:2822

imx-ipuv3 imx-ipuv3.0: warning: channel 14 busy, need wait

imx-ipuv3 imx-ipuv3.0: IPU_CONF = 0x00000004

imx-ipuv3 imx-ipuv3.0: IDMAC_CONF = 0x0000002F

imx-ipuv3 imx-ipuv3.0: IDMAC_CHA_EN1 = 0x00205000

imx-ipuv3 imx-ipuv3.0: IDMAC_CHA_EN2 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IDMAC_CHA_PRI1 = 0x18800001

imx-ipuv3 imx-ipuv3.0: IDMAC_CHA_PRI2 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IDMAC_BAND_EN1 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IDMAC_BAND_EN2 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_CHA_DB_MODE_SEL0 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_CHA_DB_MODE_SEL1 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_CHA_TRB_MODE_SEL0 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_CHA_TRB_MODE_SEL1 = 0x00000000

imx-ipuv3 imx-ipuv3.0: DMFC_WR_CHAN = 0x00000090

imx-ipuv3 imx-ipuv3.0: DMFC_WR_CHAN_DEF = 0x202020F6

imx-ipuv3 imx-ipuv3.0: DMFC_DP_CHAN = 0x00009694

imx-ipuv3 imx-ipuv3.0: DMFC_DP_CHAN_DEF = 0x2020F6F6

imx-ipuv3 imx-ipuv3.0: DMFC_IC_CTRL = 0x00000002

imx-ipuv3 imx-ipuv3.0: IPU_FS_PROC_FLOW1 = 0x80000000

imx-ipuv3 imx-ipuv3.0: IPU_FS_PROC_FLOW2 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_FS_PROC_FLOW3 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_FS_DISP_FLOW1 = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_VDIC_VDI_FSIZE = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_VDIC_VDI_C = 0x00000000

imx-ipuv3 imx-ipuv3.0: IPU_IC_CONF = 0x40000B00

imx-ipuv3 imx-ipuv3.0: warning: disable ipu dma channel 14 during its busy state

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NXP Employee
NXP Employee

Hi Adrian,

For video applications, instead use the examples from ipu-examples, I would recomend you to use the v4l2 examples located at your rootfs/unit_tests/mxc_v4l2*. You can unpack the unit test to get the source code:

(if using ltib) ./ltib -p imx-test -m prep

V4L2 will correctly handle the IPU tasks.



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Contributor III


I'm looking at the v4l2 examples, but I don't really see how to use them as a substitute for the /dev/mxc_ipu interface. Could you provide pointers on how I could achieve the following through V4L2?

  • Add a graphic overlay (RGBA format) to captured video in RAM.
  • Color space convert the overlayed video and pass to the VPU h264 encoder for saving to a file.
  • Extract arbitrary frames of the overlayed video for JPEG compression.
  • Display the overlayed video on screen, with a second overlay on top.

The main difficulty is that we have a different overlay burned into the h264 video frames from the overlay shown on screen.



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