Hi Héctor
there is no issue here with LPSPI1, on MEK board suitable pads are used for
other peripherals, muxing options can be found in sect.9.1.External Signals and Pin Assignments
i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual
As example one can try below:
Fsl-imx8dx.dtsi :
lpspi1: lpspi@5a010000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x0 0x5a010000 0x0 0x10000>;
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&clk IMX8QXP_SPI1_CLK>,
<&clk IMX8QXP_SPI1_IPG_CLK>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX8QXP_SPI1_CLK>;
assigned-clock-rates = <20000000>;
power-domains = <&pd_dma_lpspi1>;
status = "disabled";
};
Fsl-imx8qxp-mek.dts:
pinctrl_lpspi1: lpspi1grp {
fsl,pins = <
SC_P_SAI0_TXFS_ADMA_SPI1_SCK 0xD600004c
SC_P_SAI0_TXD_ADMA_SPI1_SDO 0xD600004c
SC_P_SAI0_TXC_ADMA_SPI1_SDI 0xD600004c
>;
};
pinctrl_lpspi1_cs: lpspi1cs {
fsl,pins = <
SC_P_SAI0_RXD_LSIO_GPIO0_IO27 0xE0000021
>;
};
&lpspi1 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi1 &pinctrl_lpspi1_cs>;
cs-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
status = "okay";
spidev@0 {
compatible = "rohm,dh2228fv";
status = "okay";
spi-max-frequency = <1000000>;
reg = <0>;
};
};
driver clk-imx8qxp.c
clks[IMX8QXP_SPI1_CLK] = imx_clk_gate_scu("spi1_clk", "spi1_div", SC_R_SPI_1, SC_PM_CLK_PER, (void __iomem *)(LPSPI_1_LPCG), 0, 0);
Best regards
igor