Which registers can be used to strengthen the drive capability of USB output

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Which registers can be used to strengthen the drive capability of USB output

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fisherhe
Contributor II

Hi,

   I use MCIMX6L2EVN10AB of my own board, when I use the USB port configered as USB1.1, and I found that the eye diagram is bad. I want to know which registers can be used to strengthen the drive capability of USB? I know some other cortex A9 cpu has registers to configer the usb drive capability, but I don't know if IMX6SL has or not.

  (By the way,  I know there is hardware solution to improve the eye diagram, but firstly I want to know if there is software solution.) Thank you!

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

Customer can adjust the EDGECTRL bit field if they wish in order to control the rise/fall

times and in such way to influence the signal quality and eye diagram.

  EDGECTRL bits in the USBPHYx_TXn register may be used to control
edge rate : increasing the EDGECTRL value will make the rise/fall time faster.

Regards,

Yuri.

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fisherhe
Contributor II

Hi,Yuri,

Customer changes the value of EDGECTRL bit from the default 4 to max 7, the eye diagram has a little improvement, but still not good.

Below is the eye diagram.

By the way, customer use USB1.1, the reference manual said the EDGECTRL bit is used in HS transmit. If customer use in USB1.1 mode, this bit doesn’t effect?

If there is some other software method to improve it?

Thanks a lot!

Best Regards

Fisher He

发件人: Yuri

发送时间: 2016年6月16日 13:24

收件人: Fisher He

主题: Re: - Which registers can be used to strengthen the drive capability of USB output

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Which registers can be used to strengthen the drive capability of USB output

reply from Yuri <https://community.nxp.com/people/Yuri?et=watches.email.thread> Muhin in i.MX Community - View <https://community.nxp.com/message/801707?et=watches.email.thread#comment-801707> the full discussion

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fisherhe
Contributor II

Hi,

Thank you for your relpy!

And I want to know if there is risk to use the EDGECTRL bit? I find that there is a note “NOT FOR CUSTOMER USE” in the reference manual for this bit.

Thanks a lot!

Best Regards

Fisher He

发件人: Yuri

发送时间: 2016年6月16日 13:24

收件人: Fisher He

主题: Re: - Which registers can be used to strengthen the drive capability of USB output

<https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg> NXP Community

Which registers can be used to strengthen the drive capability of USB output

reply from Yuri <https://community.nxp.com/people/Yuri?et=watches.email.thread> Muhin in i.MX Community - View <https://community.nxp.com/message/801707?et=watches.email.thread#comment-801707> the full discussion

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

the note “NOT FOR CUSTOMER USE” relates to the fact, that default value
of the EDGECTRL should be
reasonable for most customers and meets USB

specs. But really it is possible to use this bit field.

Regards,

Yuri.

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fisherhe
Contributor II

Hi,

It has no effect to improve the USB eye diagram when change the EDGECTRL bit of USBPHYx_TXn.

Customer change the value from default 4 to 7(7 is max), but it didn’t work.

Here are two questions, they may be helpful to customer

1. How to configure the IMX6 as a USB 1.1 device in Android(or Linux)?

2. How to read the value of relevant USB registers in Android(Linux),including USB PHY registers.

Then customer can compare these USB register value to their own value, may be it will help.(customer use bare-metal code )

By the way, hardware has been checked several times, but didn’t find abnormal.

Thank you very much!

Best Regards

Fisher He

发件人: Yuri

发送时间: 2016年6月16日 16:48

收件人: Fisher He

主题: Re: - Which registers can be used to strengthen the drive capability of USB output

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Which registers can be used to strengthen the drive capability of USB output

reply from Yuri <https://community.nxp.com/people/Yuri?et=watches.email.thread> Muhin in i.MX Community - View <https://community.nxp.com/message/801804?et=watches.email.thread#comment-801804> the full discussion

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Fisher

there is no direct register for drive strength of USB as this is analog block,

one can look at sect.4.3.3.1 General controls—USBPHY_CTRL register

AN4589 Configuring USB on i.MX 6 Series Processors.

http://cache.nxp.com/files/32bit/doc/app_note/AN4589.pdf

Also recommended to check usb layout recommendation in

i.MX6 System Development User’s Guide, since default linux settings should

be fine if layout is performed in accordance to these recommendations.

http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf

Best regards

igor

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fisherhe
Contributor II

Hi,Igo,

     Thank you for you and Yuri's reply. This problem has been solved. Actually ,the LDO_3V  is not enabled, only the LDO_2V5 is enabled for USB,

so, the output is cut to 2.6v.

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