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I am exploring time synchronization using the iMX 6Solo processor time synchronization functionality. I would like to know where to find specific information about the 50 MHz ± 50 ppm internal timestamping clock the iMX6 Solo uses. I need mainly its temperature drift variations. Could anyone point me where to find this info? Thx.
Best regards,
Pablo
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Hi Pablo
pll can not introduce temperature drift, it can add some additional jitter to
output clock, but temperature drift is defined by pll reference clock.
If crystal is used as reference clock, drift is defined by crystal specs.
Best regards
igor
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Hello,
According to Hardware Development Guide for i.MX6, section 2.7 (Oscillator tolerance),
for ENET (including timestamping), 24 MHz crystal +\- 50 ppm is needed.
http://cache.nxp.com/assets/documents/data/en/user-guides/IMX6DQ6SDLHDG.pdf
Regards,
Yuri.
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Hi Pablo
pll can not introduce temperature drift, it can add some additional jitter to
output clock, but temperature drift is defined by pll reference clock.
If crystal is used as reference clock, drift is defined by crystal specs.
Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------