Hi, I use i.mx6ull and Yocto Morty.
Actually I noticed that fsl,soc-operating-points (VDD_SOC_CAP) is 1.175V at 900MHz in my device tree.
(refer to https://github.com/varigit/linux-imx/commit/c27010d99a3d91703ea2d1a3f9630a9dedc3f86f)
my device tree
cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
clock-latency = <61036>; /* two CLK32 periods */
operating-points = <
/* kHz uV */
900000 1275000
792000 1225000
528000 1175000
396000 1025000
198000 950000
>;
fsl,soc-operating-points = <
/* KHz uV */
900000 1175000
792000 1175000
528000 1175000
396000 1175000
198000 1175000
>;datasheet (old)
However I found that fsl,soc-operating-points (VDD_SOC_CAP) should be 1.25V because 1.175V is old datasheet value and was updated in the latest kernel. (refer to https://github.com/varigit/linux-imx/commit/c3e4be705852c6d973d3b1f2b8b024fdea7303af)
dts (should be updated to this)
fsl,soc-operating-points = <
/* KHz uV */
900000 1250000
792000 1175000
528000 1175000
396000 1175000
198000 1175000
>;
new datasheet
https://www.nxp.com/docs/en/data-sheet/IMX6ULLCEC.pdf
history
It seems that VDD_SOC_CAP is for L1/L2 caches voltage.
(See attached file)
In my understanding, read/write from ROM/RAM will sometimes fail depending on a board.
However the circuit is not open and I am not sure what will occur.
What will occur if I set VDD_SOC_CAP 1.175V at 900MHz and why?
Why did you update the voltage at 900MHz?
Best regards,
