What is the Base Address of the GIC and Is it controlled by the SCU unit or not?

[helmy_mohamed]

Hello, 

I couldn't found the GIC Base_ Address in the Memory Map chapter. so Is that mean that any peripheral that it's base address is missing from the memory map chapter is controlled by the SCU unit or else?

[helmy_mohamed]

Hi Igor

The RM you use is for i.MX 8QuadMax but I'm using i.MX 8QuadX 

so I think the GIC base address must be written in the RM for the chip I use not in another chip in the family.

[igorpadykov]

Hi Helmy

for i.MX8X one can look at dts:

gic: interrupt-controller@51a00000

fsl-imx8dx.dtsi\freescale\dts\boot\arm64\arch - linux-imx - i.MX Linux kernel 

Best regards
igor

[helmy_mohamed]

Hi Igor

I can't found the base address for the GIC in the Table that you've mentioned. I've looked up the TRM table 2 - 18 didn't found anything.

Also nothing in the DB memory map regarding the Address you've sent.

Also If there is any peripherals with missing Base_Addresses in the TRM should I Assume that it's controlled by the SCU unit 

[igorpadykov]

Hi Helmy

it is assumed that SCFW APIs are used only for configuring

interrupts, so GIC address is not provided in Reference Manual.

Best regards
igor

[igorpadykov]

Hi Helmy

GIC address is 51A0_0000 according to Table 2-18. Dblog memory map

i.MX8QM Reference Manual (one can obtain it in local marketing office).

Yes it is controlled by the SCU and described in

sect.13.1 (SVC) Interrupt Service sc_fw_api_qm_b0.pdf included

in SCFW Porting Kit

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------