Watchdog output from imx8mp

[Marco_Savo]

Watchdog GPIO1_IO02 B6 WDT_TIME_OUT# S145 O via buffer

So, I could see that the WDT_TIME_OUT pin is controlled from the internal watchdog. What we would like to configure though, is as an heartbeat as an input for an external watchdog controller. So, how can be configured? I need a signal that would switch between states of up and low every 20 ms, otherwise the watchdog will be triggered

[Dhruvit]

Hi @Marco_Savo,

I hope you are doing well

As mentioned in section 6.6.3 External signals in the Reference Manual IMX8MPRM the WDOG_B pin is responsible for powering down the chip. Hence it can not be used for any external controller i.e. for the Heartbeat.  

Please give some more information for the other pin you mentioned 'WDT_TIME_OUT' as there is no such pin in i.MX8M Plus processor. 

For more information related to the Watchdog, kindly refer to Chapter 6.6 Watchdog Timer (WDOG) from the Reference Manual IMX8MPRM

Thanks & Regards,

Dhruvit Vasavada

[Marco_Savo]

So, fundamentally, WDT_TIME_OUT is GPIO1_IO02

We would like to use this output to send a keepalive, an heartbeat, to an external watchdog device.

[Dhruvit · Accepted solution]

Hi @Marco_Savo,

I hope you are doing well.

The GPIO1_IO02 is assigned for the internal watchdog for the WDOG_B signal and it can not be used for generating the heartbeat signal at every 20ms.

As per the Reference Manual IMX8MPRM section 6.6.2.4 Power-down counter event

"The power-down counter inside WDOG will be enabled out of reset. This counter has a
a fixed timeout value of 16 seconds, after which it will drive the WDOG_B (ipp_wdog)
signal low."

Thanks & Regards,

Dhruvit Vasavada

[Marco_Savo]

Hello, saw CONFIG_WDT_GPIO that is commonly used for the same porpoise I'm looking for, can be used for some other GPIO? GPIO1_IO6 for example, as mentioned here?

I found a detailed example of how to configure the CONFIG_WDT_GPIO option in the ESP-IDF Programming Guide. Here is a brief summary of the steps:

1. Add CONFIG_WDT_GPIO=y to your project’s sdkconfig file.
2. Define the GPIO pin to be used for the watchdog timer by adding CONFIG_WDT_GPIO_NUM=<GPIO_NUM> to your project’s sdkconfig file.
3. Include the driver/watchdog.h header file in your project.
4. Call wdt_enable() to enable the watchdog timer.
5. Call wdt_feed() periodically to reset the watchdog timer.

Here is an example of how to use the CONFIG_WDT_GPIO option in your project:

#include "driver/watchdog.h"

void app_main()
{
    // Enable watchdog timer
    wdt_enable(WDT_TIMEOUT_1S);

    // Set GPIO pin for watchdog timer
    gpio_pad_select_gpio(CONFIG_WDT_GPIO_NUM);
    gpio_set_direction(CONFIG_WDT_GPIO_NUM, GPIO_MODE_OUTPUT);

    // Feed watchdog timer periodically
    while (1) {
        gpio_set_level(CONFIG_WDT_GPIO_NUM, 0);
        wdt_feed();
        gpio_set_level(CONFIG_WDT_GPIO_NUM, 1);
        wdt_feed();
    }
}

[Marco_Savo]

WDT_TIME_OUT is on the support board.

 i.MX8MP Ball Name GPIO1_IO02

 i.MX8MP Ball B6 

“Watchdog GPIO1_IO02 B6 WDT_TIME_OUT# S145 O via buffer”

[Marco_Savo]

There is a way to edit this setup for I don't know add a clock and convert this signal in a real watchdog signal o heartbeat that would fluctuate from high and low levels?

./workspace/sources/linux-congatec-sx8p/arch/arm64/boot/dts/congatec/imx8mp-cgtsx8p.dts
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};


pinctrl_wdog: wdoggrp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
>;
};

I don't know, can i add a clock as an output for this WDT_TIME_OUT pin?

./workspace/sources/linux-congatec-sx8p/arch/arm64/boot/dts/freescale/imx8mp.dtsi

wdog1: watchdog@30280000 {
compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
reg = <0x30280000 0x10000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_WDOG1_ROOT>;
status = "disabled";
};

wdog2: watchdog@30290000 {
compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
reg = <0x30290000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_WDOG2_ROOT>;
status = "disabled";
};

wdog3: watchdog@302a0000 {
compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
reg = <0x302a0000 0x10000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MP_CLK_WDOG3_ROOT>;
status = "disabled";
};