Watchdog freeRTOS

[Guy_L]

Hi NXP team,

I'm trying to figure out how to work with the fsl_wdog (version (2,1,1)).

If I'm initializing the watchdog (WDOG_Init) and never calling to WDOG_Refresh the system resets after the timeout.

The problem is when I call to WDOG_Refresh even once and then never calling it again, the system reset never happens.

Can you please advise?

Thanks!

Guy

[Sanket_Parekh]

Hi @Guy_L ,

I hope you are doing well.

One can refer to boards/evkmimx8mn/driver_examples/wdog/wdog.c and readme.txt.

Please try with the above example code by setting EXAMPLE_DISABLE_WDOG_RESET_FUNCTION to 0 and correct DEMO_WDOG_BASE.

Please provide me with the Processor part number and Wdog information for further debugging.

Thanks & Regards

Sanket Parekh

[Guy_L]

Hi Sanket  and thanks for your answer!

I've tried to write (0) to EXAMPLE_DISABLE_WDOG_RESET_FUNCTION but it didn't help.
The output I see is:

System reset by: Software Reset!

- 2.Testing system reset by WDOG timeout.
--- wdog Init done---

and the system just get "stuck" (the while (1) {} part) but but the reset never occurs.

The DEMO_WDOG_BASE is set to WDOG1.

The processor that I'm using is Cortex-M4 on SOM dart mx8m mini

Thank you!

[Sanket_Parekh]

Hi @Guy_L ,

Not all watchdogs can be used for reset of the system.

In the I.MX8MM processor WDOG3 is used for resetting the system (by asserting WDOG_RESET_B_DEB to SRC ).

One can look at section 6.5.5.4 M4 Reset Control Register (SRC_M4RCR) in i.MX 8M Mini Applications Processor Reference Manual.

Bit [4:9] of SRC_M4RCR determines the behavior of RESET in the M4 core. 

SRC registers are defined as struct SRC_Type in SDK_2_12_1_EVK-MIMX8MM/devices/MIMX8MM6/MIMX8MM6_cm4.h

For more information about system reset using watchdog one can refer to 6.5 System Reset Controller (SRC) and  6.6.2.6.1 Watchdog reset generation in i.MX 8M Mini Applications Processor Reference Manual.

Thanks & Regards,

Sanket Parekh