Variscite var-som-mx6 ethernet IO/MUX

[ameerhamza]

Dear all,

I have Variscite board available with me (var-som-mx6 board) and I am trying to develop custom driver for the ethernet (with out using any linux or u-boot). As if some one already fimiliar with the board, there are two PCBs mounted, one is Processor board and another one is base board. The Processor board bears PHY (KSZ9031) which is very similar to the phy used in sabre_lite board (KSZ9021) and also share same Ethernet controller used in Sabre_lite but the problem is that there are no schematics available for the processor board so in order to develop the driver first thing I need to figure out is the connection between the processor and the PHY but unfortunately I could not find its datasheet any where, also requested multiple times to variscite but there is no response from them. I also thought of doing PIN MUX through git but there are no specific information available. If any body could help me figure out the PIN CONNECTION or could provide me the source for linux driver for var-som-mx6 would be very highly appreciated. Thank you in advance.

Best Regards,

Hamza.

[igorpadykov]

Hi Hamza

one can try to build image using link

VAR-SOM-MX6 Yocto Jethro R4 Build Yocto release - Variscite Wiki 

and check board iomux settings in linux/arch/arm/boot/dts folder

Ethernet driver is described in sect.4.3 ENET IEEE-1588

attached Linux Manual.

Best regards
igor
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[ameerhamza]

Hi igor,

Quick response of you guys is always appreciated. I have downloaded and built the linux source and i have multiple .dts avialable at "var-som-mx6/build_x11/tmp/work-shared/var-som-mx6/kernel-source/arch/arm/boot/dts", but the problem is none of them bears the information for the IOMUX of ethernet controller for Variscite var-som-mx6. Your little more help would really cure my headache.

Best Regards,
Hamza.

[igorpadykov · Accepted solution]

Hi Hamza

please check sect. 3.1.2 Variscite dts files

VAR-SOM-MX6 GPIO - Variscite Wiki 

GitHub - varigit/meta-variscite-fslc: Variscite BSP layer for FSL community BSP 

look for pinctrl_enet: enetgrp, like example in imx6qdl-sabresd.dtsi

Best regards
igor

[ameerhamza]

Hi igor,

Thanks a lot for your help. I am able to figure out the pins used from their repo barebox/imx6q-var-som.dtsi at master · RobertCNelson/barebox · GitHub , One little confusion is that at line number 101, MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 is defined as 0x80000000 but 31st bit of the register (IOMUXC_SW_PAD_ENET_CRS_DV) is reserved, if you could please carify what does it actually mean.