Hi community,
I have a question about i.MX6Q system reset.
In fact, our customer faced a system halt problem when rebooting.
However, they found the condition when the problem is occurred.
The problem is occurred if i.MX6Q secondary core is valid when reboot, and not occurred in only primary core is valid when reboot.
[Question]
Is this setting (i.MX6Q secondary core is valid when reboot) is allowable?
Or i.MX6Q should be rebooted with only primary core?
Best Regards,
Satoshi Shimoda
If you mentioned is OS.
Here is the linux SMP flow. At the begining, the CPU0 is using only.
init/main.c:start_kernel()
|
\|/
init/main.c:rest_init
{
……
kernel_thread(kernel_init, NULL, CLONES_FS | CLONE_SIGHAND)
……
}
|
\|/
kernel_init
|
\|/
/* called by boot processor to activate the rest */
init/main.c: smp_init()
{
……
for_each_present_cpu(cpu) {
if (num_onlien_cpus() >= setup_max_cpus)
break;
if ( !cpu_online(cpu))
cpu_up(cpu);
}
/* Any cleanup work */
printk(KERN_INFO "Brought up %ld CPUs\n", (long)num_online_cpus());
smp_cpu_done(setup_max_cpus);
……
}