VPU at 352MHz

[jotes]

Is there any reason why the VPU clock is sourced from IMX6QDL_CLK_PLL2_PFD2_396M when using CONFIG_MX6_VPU_352M option? Can we use IMX6QDL_CLK_PLL2_PFD0_352M instead (since it already is set to run at 352 MHz)?

[igorpadykov · Accepted solution]

Hi jotes

in general IMX6QDL_CLK_PLL2_PFD0_352M also can be used.

In nxp linux seems it is used for ldb, which may require special switching procedure
according to EB821 LDB Clock Switch_Procedure
&clks {    fsl,ldb-di0-parent = <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;..

Best regards
igor
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[jotes]

In our board the IMX6QDL_CLK_PLL2_PFD2_396M clock is a source for MMDC0 clock, which should be fixed at 396 MHz (we are using LPDDR2 memory). CONFIG_MX6_VPU_352M is lowering it to 352 MHz. Is it legal to change DDR clock in Linux? We thought it can only be changed through DCD header. But the system seems to work properly, so we are confused...

[igorpadykov]

for ddr clock change examples one can look in Linux manual Chapter

Dynamic Bus Frequency Driver

https://www.nxp.com/webapp/Download?colCode=L4.1.15_1.1.0_LINUX_DOCS&Parent_nodeId=13376994810717061...