What is the Freescale recommended operation mode for the VDDARM voltage if the design uses the MMPF0100 PMIC? Our Design implementation for the PMIC matches the Sabre Smart Devices Platform.
Is there any advantage to running in the Analog regulation mode if PMIC supplies the ARM and the SOC voltage from separate buck converters as the PMIC MMPF0100?
If you are using the Analog regulation mode, why bother to change voltage when the CPU changes frequency since a voltage change will just dissipate the power in the internal LDO which is in the iMX6?
IMX6 Datasheet(s) [say, Table 6 (Operating Ranges) of IMX6DQCEC, rev. 2.3, 07_2013] provide
VDDARM_IN (VDDSOC_IN) power supply specs for two options : LDO enabled and LDO bypassed.
The first case is used for cases when internal regulars are applied to supply internal i.MX6 modules;
the second one is intended for external supply only . The first case is recommended because
internal regulators are tested and proven for processor operations, DVFS approach in (Linux) BSP
uses this case. As for additional consumption, concerned with the regulators – this is optimized and
not very critical.