VDD_SNVS_0v9 rail on I.mx8 EVK

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VDD_SNVS_0v9 rail on I.mx8 EVK

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enoch_arthur
Contributor IV

Hi, I noticed in that on the I.mx8 EVK , VDD_SNVS_0v9 rail from the PMIC is disconnected and a separate regulator is used to generate this voltage. May I know why this is so. I am designing with the imx8 and pf4210  but have limited boards space so want to reduce my BOM count as much as possible. I will therefore want to just use the PMIC to supply VDD_SNVS_0v9 rail, what are the risks, please.

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Enoch,

  Actually, the pin VSNVS(PIN 43) of PF4210 can only output 1V , not 0.9V, so external LDO for VDD_SNVS_0V9 is used. The LDO can't be omitted.

Hope the informatioin is helpful to you.

Have a nice day!

B.R,

Weidong

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enoch_arthur
Contributor IV

Hi Weidong, 

Thanks for the response, and yes it doesn't say in the datasheet it can provide 0.9V. Just surprised  they created this chip to support i.mx 8, even named the output vsnvs but yet you can't use it for what it was designed for. 

By the way as the voltage range for the VDD_SNVS is 0.81 to 0.99 , can i put a diode to drop the 1V to 0.94 and use it? will that be a problem? also, I have another 0.9V on my board from a switchmode power chip, can I use this or it has to be from an LDO?

Many thanks for your help.

Enoch

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enoch_arthur
Contributor IV

forget that diode drop, miscalculated  0.6V diode drop for  0.06.

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weidong_sun
NXP TechSupport
NXP TechSupport

Dear Enoch Arthur,

    For hardware design, validation is a great matter of consequence. Since solution is validated on evaluation board, you had better follow the usage on EVK schematic. As for the usage you mentioned , in theory, it seems that it is feasible, but no validation tells us how about result. so I couldn't really tell you if it is OK.

Hope the advice is helpful to you!

Have a great day!

B.R,

weidong

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