Use M7 core to control display on iMX8MN

[terry_lv]

This demo will demonstrate how to use M7 core to control display on i.MX8MN.

In this demo, generally, we'll add a MIPI-DSI and LCD driver to M7 SDK code and Linux kernel will pass display request to M7 core by rpmsg.

Function:

1. Linux kernel on A core will not handle mipi-dsi and it will send display request to M7 core by RPMSG.

2. M7 core will control MIPI-DSI, LCD and handle display request.

3. When kernel enter sleep, M7 core will show a 1 sec clock (from 0 - 7, updated every second) on screen. (See video for details.)

4. Please read readme.txt and other readme files in patch packages.

[arthurb]

hi @terry_lv
is there a CSI+ISP drivers for M7 SDK?

[terry_lv]

Hi @arthurb ,

  The mipi csi and dsi drivers can be found in RT1180 SDK.

  But there's no ISP driver in SDK.

  Thanks!

Regards

Terry

[gnulux]

Hi, 

Instead the clock i would like to display an image (bitmap) from the M7 when A53 is in supend mode. 

Do you think it is possible? 

In normal mode the A53 will display UI from weston. Does the M7 can manage that ? 

my hardware is IMX8MP  5.10 kernel

Regards

[terry_lv]

Hi,

  See reply below.

1. Instead the clock i would like to display an image (bitmap) from the M7 when A53 is in supend mode.
   Do you think it is possible?
   [Ty] It is possible, but it also depends on image size and DDR retention status in suspend.
   If the image size is small enough to fit TCM, it is possible to store the image in TCM.
   Otherwise, the DDR can't be put to retention when A53 in suspend.
   In this demo, due to TCM size limitation, we only display a 184x300 image on the LCD.
2. In normal mode the A53 will display UI from weston. Does the M7 can manage that ?
   [Ty] Yes. M7 should be able to manage it.

  Thanks!

Regards

Terry

[sm_aa]

Hi Terry,

is it possible to store the LCDIF framebuffer in OCRAM (or even TCM) given that the display is small enough?

I'm facing the issue that the displays stays black and LCDIF seems to report AXI bus master errors (LCDIF_BM_ERROR_STAT is set to addresses in the 0x900000-0x97FFFF memory range).

Any idea what could be the reason for that? Is the display controller able to access the internal memory at all? I would like to use that while DDR is in retention mode during suspend.

Regards

[terry_lv]

Hi,

"is it possible to store the LCDIF framebuffer in OCRAM (or even TCM) given that the display is small enough?"

[Ty] Yes, it is possible. This demo uses the Framebuffer on the TCM for display.

"I'm facing the issue that the displays stays black and LCDIF seems to report AXI bus master errors (LCDIF_BM_ERROR_STAT is set to addresses in the 0x900000-0x97FFFF memory range).
Any idea what could be the reason for that? Is the display controller able to access the internal memory at all? I would like to use that while DDR is in retention mode during suspend."

[Ty] I recommend you try to run this demo on i.mx8mn first. This demo might meet your request -- display with FB on TCM when A core suspend.

But there's one issue that the kernel used in this demo is very old now.

  Thanks!

Regards

Terry

[sm_aa]

Hi Terry,

thanks for the answer. The demo code linked at the beginning of this thread stores the framebuffer in DDR memory instead of TCM (TEST_FB_PADDR in board.h points to 0x60300000). Do you have another version (somewhere else?), which stores the framebuffer in TCM?

I have a derived version of the example running on i.mx8mn, but I'm encountering the aforementioned bus errors when changing the framebuffer address to the TCM or OCRAM range.

Any ideas?

Thanks! Regards

[terry_lv]

Hi sm_aa,

  I'm doing test by adjusting lcdif parameters.

  Have you modified m4_disp_info in imx8mn_evk.c?

  Please note that the pixelclock, hactive and vactive should be set to a proper value.

  Will let you know the test result.

  Thanks!

Regards

Terry

[sm_aa]

Hi Terry,

thanks! Yes, the display works fine as long as the framebuffer is stored in external DDR memory. It stops working as soon as I relocate it to OCRAM or TCM.

Best regards

[terry_lv]

Hi sm_aa,

  Have you modified the m4_disp_info structure in imx8mn_evk.c?

  I have some concerns here:

1. As the default configuration of MIPIDSI is only for 1080P@60fps, I doubt if your code can work when hactive and vactive are changed in m4_disp_info structure.
2. As the ATF is on OCRAM, I'm afraid we can't use OCRAM as framebuffer. 
   Note: I checked the code in imx-mkimage. The ATF load address is 0x00960000. If we want to use ATF, we may need to do:
   1. Put SPL load address to TCM, like i.MX8MM.
   2. Put ATF load address to start of OCRAM. So as to have more OCRAM space.

  Thanks!

Regards

Terry

[terry_lv]

Hi,

  It has been a long time since I publish the demo. I don't recall it well now.

  I'll try it later and if there's a problem, it may need additional time to fix the issue.

  Thanks!

Regards

Terry

[hfranco]

Hi @terry_lv,

Does this also work with iMX8M Plus? Kernel downstream 5.15? Or at least it's possible to make it work?

Best Regards,
Hiago.

[terry_lv]

Hi,

  This demo can be ported to work on i.MX8MP.

  But I'm not sure about the changes.

  This demo is created a long time ago and kernel, as well as SDK have changed a lot since then.

  Thanks!

Regards

Terry