Usage of SNVS_TAMPERx pin in i.MX7

[ko-hey]

Hi all

Let me confirm about the usage of SNVS_TAMPERx pins.

Q1.

According to the table 97 and 100 in datasheet, the Power Group of those pins are VDDD_SNVS_1P8_CAP.

It should connect to VDDD_SNVS_1P8_CAP when user do external pull-up.

Am I correct ?

I'm referring the following document.

http://www.nxp.com/assets/documents/data/en/data-sheets/IMX7DCEC.pdf 

Q2.

Could you tell me the Vih and Vil value of SNVS_TAMPERx pin when user use it as a input ?

Q3.

Could you tell me the Voh and Vol value of SNVS_TAMPERx pin when user use it as a output ?

Ko-hey

[art · Accepted solution]

A1. Yes, your understanding is correct.

A2. The TAMPER pins can be treated as regular GPIOs, so, for the 1.8V power domain, the upper Vil margin is 1.8V * 0.3 = 0.54V and the lower Vih margin is 1.8V * 0.7 = 1.26V.

A3. The TAMPER pins can be treated as regular GPIOs, so, for the 1.8V power domain, the upper Vol margin is 1.8V * 0.2 = 0.36V and the lower Voh margin is 1.8V * 0.8 = 1.44V.

Have a great day,
Artur

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