Hello, we are nearing completion of a design using the i.MX535, and did a comparison of the DDR configuration registers to ensure no changes were accidentally made as OS patches have been applied since we last performed DDR stress testing. All of the DDR registers are the same with the following two exceptions:
It appears both of these bit fields are status / read only, and we'd like to determine if this difference would normally be expected when none of the other DDR configuration parameters have changed. Could it solely be a function of board-to-board variation?
Thanks - Andrew
Hi Andrew
yes this is right, it may be a function of chip and board-to-board variation.
Calibration is described in AN4466 i.MX53 DDR Calibration
https://www.nxp.com/docs/en/application-note/AN4466.pdf
Best regards
igor
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