Unable to capture video on IMX6Q

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Unable to capture video on IMX6Q

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jemish_1990
Contributor IV

Hi All,

We have unit made of two boards. One board with IMX6Q processor and another with DM8148 processor.

Board with DM8148 processor is sending video on 8-bit lines with BT.656 (embedded sync) configuration.

In this case we don't need any decoder chip or camera sensor we are getting digital data directly from DM8148.

This is data is as per BT.656 format and NTSC (720 x 480).  To capture this data I have hard coded BT.656 , NTSC and () resolution in "mxc_v4l2_capture.c" file.

We checked in scope that clock is coming properly (27 Mhz) and data is also coming. 

Still when we try to capture data using v4l2 application we are getting below error.

ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0

Below are the pins we are using and configuration in dtsi file.

                                MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0x80000000

                                MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0x80000000

                                MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0x80000000

                                MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0x80000000

                                MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0x80000000

                                MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0x80000000

                                MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0x80000000

                                MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0x80000000

                                MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000

                                MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x80000000

                                MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x80000000

                                MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0x80000000

Any suggestions will appreciated for this issue?

Do we need any additional configuration? Any thing needed from our side.

Thanks,

Jemish

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jemish_1990
Contributor IV

Hi Yuri,

Thanks for your suggestion!

It was some other issue. We managed to got it working.

Below is the small summary:

We are using kernel based on wandboard and there is one register setting :

regmap_update_bits(gpr, IOMUXC_GPR1, 1 << 19, 1 << 19) (Mux selection for MIPI /CSI interface with IPU)

Which is based on of_machine_is_compatible("fsl,imx6q-sabreauto") or  of_machine_is_compatible("fsl,imx6q-sabresd") in file arch/arm/mach-imx/mach-imx6q.c

It wasn't configured for our board. Once we set it capture got working.

We can close this thread now.

Thanks,

Jemish

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Yuri
NXP Employee
NXP Employee

Hello,

Please use mxc_v4l2_tvin.out, also, please look at below links where similar problem was solved

ADV7610 CSI0 input

Support BT1120 progressive mode in Mx6Q

The following may be useful :

Q&amp;A: Is it really possible to implement the BT656 with SAV / EAV and without external HSYNC/VSYN...


Have a great day,
Yuri

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jemish_1990
Contributor IV

Hi Yuri,

Would you please let me know where I can find "mxc_v4l2_tvin.out"? Please upload source code if you have for this application.

My requirement is simple. I have 8 bit BT 656 (embedded sync) data coming having NTSC resolution (720 x 480). This data is proven on AM3517 processor and it is being captured well. Now we are replacing AM3517 with IMX6Q. Would you please let us know what are relevant changes required in driver to make the capture work?

Thanks,

Jemish

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Yuri
NXP Employee
NXP Employee

Hello,

  NXP demo images contain  /unit_tests directory.

Check it.

Regards,

Yuri.

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jemish_1990
Contributor IV

Hi Yuri,

As I mentioned we are using custom board so I may need to change source code of the application. It would be appreciated if you can provide me source code of application you are talking about or provide me any link where I can find such demos. Honestly I don't know which NXP demo images you are talking about.

Note: Here we are not using any sensor/ decoder chip to because we are already getting digital data so we have written dummy slave driver to complete v4l2 path (Video device and Sub device). That's why we need to modify IM6Q parameters only.  Any pointer regarding this would be appreciated.

Thanks,

Jemish

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jemish_1990
Contributor IV

Hi Yuri,

I have found source code "mxc_v4l2_tvin.out" of application. With this application I am facing same error!

Any suggestions?

Thanks,

Jemish

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jemish_1990
Contributor IV

Hi Yuri,

I am configuring mxc_v4l2_capture driver with below parameters for my requirement.

                ifparm.u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_BT_8BIT;

                cam_fmt.fmt.pix.width = NTSC_WIDTH;           /* 720 */

                cam_fmt.fmt.pix.height = NTSC_HEIGHT;        /* 480 */

                csi_param.data_width = IPU_CSI_DATA_WIDTH_8;

                csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;

                ifparm.u.bt656.clock_curr = 0;

               ifparm.u.bt656.bt_sync_correct = 0;

              

Below is the output log of kernel dmesg while runnig capture application.

In MVC: mxc_v4l_open

   device name is Mxc Camera

End of mxc_v4l_open: v2f pix widthxheight 720 x 480

End of mxc_v4l_open: crop_bounds widthxheight 720 x 480

End of mxc_v4l_open: crop_defrect widthxheight 720 x 480

End of mxc_v4l_open: crop_current widthxheight 720 x 480

On Open: Input to ipu size is 720 x 480

Pixcel format : IPU_PIX_FMT_UYVY

value of data register :a30In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 80045626

   case VIDIOC_G_INPUT

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c050561a

   case VIDIOC_ENUMINPUT

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0045627

   case VIDIOC_S_INPUT

In MVC:mxc_streamoff

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c050561a

   case VIDIOC_ENUMINPUT

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 80085617

   case VIDIOC_G_STD

In mxc_v4l2_g_std

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 40085618

   case VIDIOC_S_STD

In mxc_v4l2_s_std b000

Here @line 1473 and in function mxc_v4l2_s_std

   Setting standard to NTSC

   Setting standard to NTSC b000

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0cc5616

   case VIDIOC_S_PARM

In mxc_v4l2_s_param

   Current capabilities are 28

   Current capturemode is -2140314248  change to 0

   Current framerate is 0  change to 0

   clock_curr=mclk=0

   g_fmt_cap returns widthxheight of input as 720 x 480

Pixcel format : IPU_PIX_FMT_UYVY

value of data register :a30In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 80685600

   case VIDIOC_QUERYCAP

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0cc5604

   case VIDIOC_G_FMT

In MVC: mxc_v4l2_g_fmt type=1

   type is V4L2_BUF_TYPE_VIDEO_CAPTURE

End of mxc_v4l2_g_fmt: v2f pix widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_bounds widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_defrect widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_current widthxheight 720 x 480

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0cc5605

   case VIDIOC_S_FMT

In MVC: mxc_v4l2_s_fmt

   type=V4L2_BUF_TYPE_VIDEO_CAPTURE

value of buffer size 691200

value of byterperline 1440

End of mxc_v4l2_s_fmt: v2f pix widthxheight 720 x 480

End of mxc_v4l2_s_fmt: crop_bounds widthxheight 720 x 480

End of mxc_v4l2_s_fmt: crop_defrect widthxheight 720 x 480

End of mxc_v4l2_s_fmt: crop_current widthxheight 720 x 480

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0cc5604

   case VIDIOC_G_FMT

In MVC: mxc_v4l2_g_fmt type=1

   type is V4L2_BUF_TYPE_VIDEO_CAPTURE

End of mxc_v4l2_g_fmt: v2f pix widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_bounds widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_defrect widthxheight 720 x 480

End of mxc_v4l2_g_fmt: crop_current widthxheight 720 x 480

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0145608

   case VIDIOC_REQBUFS

In MVC:mxc_streamoff

MVC: In mxc_free_frame_buf

In MVC:mxc_allocate_frame_buf - size=691200

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0445609

   case VIDIOC_QUERYBUF

In MVC:mxc_v4l2_buffer_status

In MVC:mxc_mmap

   pgoff=0x72500, start=0x76daa000, end=0x76e53000

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c044560f

   case VIDIOC_QBUF

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0445609

   case VIDIOC_QUERYBUF

In MVC:mxc_v4l2_buffer_status

In MVC:mxc_mmap

   pgoff=0x72600, start=0x76d01000, end=0x76daa000

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c044560f

   case VIDIOC_QBUF

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0445609

   case VIDIOC_QUERYBUF

In MVC:mxc_v4l2_buffer_status

In MVC:mxc_mmap

   pgoff=0x72700, start=0x76c58000, end=0x76d01000

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c044560f

   case VIDIOC_QBUF

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 40045612

   case VIDIOC_STREAMON

In MVC:mxc_streamon

Here in at line 458

UYVY

Here in at line 467

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl c0445611

   case VIDIOC_DQBUF

In MVC:mxc_v4l_dqueue

ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0

In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 40045613

   case VIDIOC_STREAMOFF

In MVC:mxc_streamoff

In MVC:mxc_free_frames

In MVC:mxc_v4l_close

In MVC:mxc_streamoff

Would you please point out what is going wrong here?

Thanks,

Jemish

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jemish_1990
Contributor IV

Hi Yuri,

Here are the configuration of few IPU registers  which I find during running an application .

IPU1_CSI0_SENS_CONF (0x2630000)

= 0x02000a30

IPU1_CSI0_SENS_FRM_SIZE (0x2630004)

= 0x01df02cf

IPU1_CSI0_ACT_FRM_SIZE (0x2630008)

= 0x01df02cf

IPU1_CSI0_CCIR_CODE_1 (0x2630014)

= 0x010d07df

IPU1_CSI0_CCIR_CODE_2 (0x2630018)

=0x00040596

IPU1_CSI0_CCIR_CODE_3 (0x263001c)

= 0x00ff0000

Which seem to be correct for our requirement. Would you please let us know if I am missing anything or doing something wrong?

Still need to configure something.

Thanks,

Jemish

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jemish_1990
Contributor IV

Hi Yuri,

I am stuck at this stage. I would appreciate if you can give some suggestions or checklist that need to be verified.

Thanks,

Jemish

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Yuri
NXP Employee
NXP Employee

Hello,

please try to disable DATA_EN for CSI interface.

Regards,

Yuri.

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1,143 Views
jemish_1990
Contributor IV

Hi Yuri,

Thanks for your suggestion!

It was some other issue. We managed to got it working.

Below is the small summary:

We are using kernel based on wandboard and there is one register setting :

regmap_update_bits(gpr, IOMUXC_GPR1, 1 << 19, 1 << 19) (Mux selection for MIPI /CSI interface with IPU)

Which is based on of_machine_is_compatible("fsl,imx6q-sabreauto") or  of_machine_is_compatible("fsl,imx6q-sabresd") in file arch/arm/mach-imx/mach-imx6q.c

It wasn't configured for our board. Once we set it capture got working.

We can close this thread now.

Thanks,

Jemish

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