UART3 PIN MUX of MIMX8MQ7CVAHZAA Error in Pins tool v5

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UART3 PIN MUX of MIMX8MQ7CVAHZAA Error in Pins tool v5

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emilzachariageo
Contributor II

Hi,

While I was going through the Pin Mux function of iMX8M in Pins tool for i.MX Processor v5, ball no A4 with name ECSPI1_MOSI has a function which seems to be an error. It showed that ball no A4 had a Pin Mux function of UART3_RX which is not mentioned in the datasheet. Please provide the support.

Thanks in Advance

Emil

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nxa31032
NXP Employee
NXP Employee

Hello Emil,

     The SW_MUX_CTL_PAD_ECSPI1_MOSI could be configured to UART3_RX. In fact every UARTx_TX could be configured to UARTx_RX in design, just like that in this case.  Pad ECSPI1_MOSI could be configured to UART3_TX in ALT1 mode,  so it could also be configured to UART3_RX, but please note that, when configured to UARTx_RX, we're required to configure the IOMUXC_UART3_RXD_SELECT_INPUT (take the reference manual at page 2471), in this case, we set the " DAISY" to "1".

      This work has been done by pintool when users configure the pad to UARTx_RX function. Please click "Registers" and select "Show modified registers only" just like the attached picture shows.Capture.PNG

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nxa31032
NXP Employee
NXP Employee

Hello Emil,

     The SW_MUX_CTL_PAD_ECSPI1_MOSI could be configured to UART3_RX. In fact every UARTx_TX could be configured to UARTx_RX in design, just like that in this case.  Pad ECSPI1_MOSI could be configured to UART3_TX in ALT1 mode,  so it could also be configured to UART3_RX, but please note that, when configured to UARTx_RX, we're required to configure the IOMUXC_UART3_RXD_SELECT_INPUT (take the reference manual at page 2471), in this case, we set the " DAISY" to "1".

      This work has been done by pintool when users configure the pad to UARTx_RX function. Please click "Registers" and select "Show modified registers only" just like the attached picture shows.Capture.PNG

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emilzachariageo
Contributor II

Thanks Gavin.

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