Hello all,
I'm trying to port u-boot to our custom design.
I got the master sources from git.denx.de/u-boot-imx and adapted my board from the imx53 loco platform. (We have NAND flash, DDR3) Everything compiles well.
I'm loading it to the board throug gdb via a Peedi (Ronetix).
The board is now configured to boot from NAND. When the NAND is empty, the bootloader blocks at line 283 in lowlevel_init.S
#else | /* CONFIG_MX53 */ |
ldr r0, =CCM_BASE_ADDR |
/* Gate of clocks to the peripherals first */ | |
ldr r1, =0x3FFFFFFF | |
str r1, [r0, #CLKCTL_CCGR0] | |
str r4, [r0, #CLKCTL_CCGR1] |
However, when I first flash barebox to the board (from a previous attempt on which I also have some problems, causing me to try uboot instead) which do run fine, then I'm also able to start uboot through gdb... Apparently, it does some other initialisation before the jtag takes over...
Who knows what is happening here?
Solved! Go to Solution.
Not sure how to configure Peedi jtag, but for Realview ICE it should be looked like this:
Device=>Custom Device=>UNKNOWN=>IR Length = 5
Device=>Custom Device=>UNKNOWN=>IR Length = 4
Device=>Registered Device=>CoreSight=>ARMCS-DP
Device=>Registered Device=>Cortex=>Cortex-A8
Set CoreSight base address = 0xC0008000
Regards,
Jacky
Wouter, please click Correct Answer/Helpful Answer if your question has been answered.
Thanks,
Yixing
Not sure how to configure Peedi jtag, but for Realview ICE it should be looked like this:
Device=>Custom Device=>UNKNOWN=>IR Length = 5
Device=>Custom Device=>UNKNOWN=>IR Length = 4
Device=>Registered Device=>CoreSight=>ARMCS-DP
Device=>Registered Device=>Cortex=>Cortex-A8
Set CoreSight base address = 0xC0008000
Regards,
Jacky