Transient response of Power line

[ban45]

Is there a standard for the transient response of the power line (i.e. NVCC_DRAM) of i.MX6?
Shouldn't the input voltage range be exceeded?
Could you tell me where to put the data sheet？

I think power response is a problem,
but Is there anything that can be done on the CPU side?

[igorpadykov]

Hi  Yasunori

for NVCC_DRAM  of i.MX6S power supply requirements one can follow
Table 8. Operating Ranges, sect.4.2.1 Power-Up Sequence i.MX6S Datasheet
https://www.nxp.com/docs/en/data-sheet/IMX6SDLCEC.pdf 
and ripples requirements defined in Table 2-6. Power and decouple recommendations
i.MX6DQSDL Hardware Guide:
https://www.nxp.com/webapp/Download?colCode=IMX6DQ6SDLHDG

Best regards
igor
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[ban45]

Thank you igorpadykov.

i.MX6DQSDL Hardware Guide.

The following contents were described in the guide.

"Common requirement for ripple noise should be less
than 5% Vp-p of supply voltage average value.
Related power rails affected: all VDD_xxx_IN and
VDD_xxx_CAP."

Is it safe to operate even if 5% Vp-p exceeds the input range?

[igorpadykov]

>Is it safe to operate even if 5% Vp-p exceeds the input range?

sorry, values in Table 8. Operating Ranges should not be exceeded.

Best regards
igor