The side effect/impact of SSC(Spectrum Spread) on PLL2.

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

The side effect/impact of SSC(Spectrum Spread) on PLL2.

Jump to solution
918 Views
asou_junichi
Contributor I

SSC(Spectrum Spread) is enabled and only DDR and LVDS use the PLL2 clock.

(PLL2 clock : 396MHz -> 384MHz by 23kHz step)
In the case, are there any side effect/impact to the connected devices to the clock delivered from PLL2?

Labels (1)
0 Kudos
Reply
1 Solution
730 Views
igorpadykov
NXP Employee
NXP Employee

Hi

yes one should consider SSC effect on any devices (modules) using that clock,

in particular for ddr check micron document p.14

http://www.micron.com/~/media/documents/products/data-sheet/dram/ddr3/ddr3l_2gb_graphics_addendum.pd...

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
Reply
2 Replies
730 Views
asou_junichi
Contributor I

Hi,

Thank you for an answer.

I got it.

BR,

Jun

0 Kudos
Reply
731 Views
igorpadykov
NXP Employee
NXP Employee

Hi

yes one should consider SSC effect on any devices (modules) using that clock,

in particular for ddr check micron document p.14

http://www.micron.com/~/media/documents/products/data-sheet/dram/ddr3/ddr3l_2gb_graphics_addendum.pd...

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos
Reply