The power-up of the IMX28 is not reliable

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The power-up of the IMX28 is not reliable

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MarcCoussement
Contributor I

I found a strange power-up problem with the IMX28, it is can be simulated on the imx28 evaluation kit.

  1. Set the board in 5V wall power mode, no battery or USB connected.
  2. Windows CE installed on NAND
  3. Power down (Mains) the power supply
  4. Turn power –on before the 5Vdc is completed discharged, critical point is about 1Vdc
  5. The CPU will reboot but will get stuck in the xldr part
  6. Reset button is not working
  7. oscillator is still running
  8. The only way to reset the CPU without turn-off the power is by touching one of the XTAL pins with your finger (hence injecting some 50Hz disturbance).

 

I did some measuring, in some cases the XTAL will continue to oscillate even if the wall 5V power is very low, but the CPU goes in reset and restarts.Boot sequence fails somewhere in the XLDR code. External reset is not working anymore. You need to restart the XTAL oscillator to proper restart.

Keep in mind it is difficult to get in this situation but one can simulate it by unplugging the mains power of the eval kit and reconnect it before the power is completely discharged, critical point is somewhere around 1Vdc measured on the 5Vdc wall.

At this point the power-up of the IMX28 is not reliable, and a external Watchdog or reset chip can´t solve the problem as the external reset is not working once you get in this situation.

Kind regards

Marc,

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MarcCoussement
Contributor I

The search to this problem has been stopped; the power supply in the final project is designed in a way the power does not fade out as a standard power supply.

I guess this is a chip problem,

One important point is that de Power-up reset delay is way too short it is about 3ms!!!

According Freescale datasheet Reset delay is shorter than 100 ms,.... well yes 3ms is shorter. But is way to short.

 

Marc

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DnaJohnny
Contributor I

Hello Marc,

I think I have the same problem with the iMX28 in a little bit different configuration. We have on the pin BATTERY/DCDC_BATT a supercap. We have also a Schottky diode from BATTERY to VDD4P2 like in the EVK. If the voltage on BATTERY around 0.8V and above, the system has the same failure as you described.

Have you any new information in the meantime?

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MarcCoussement
Contributor I

hi,

New information, I did a modification to the XLDR code. On entry I set the watchdog to 8000 msec. So expecting the watchdog will restart the CPU if it get stuck in the XLDR code …. But no ….even the watchdog is dead after a power drop as described in my previous post.

Marc,

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MarcCoussement
Contributor I

hi,

 

New information,

The CPU seems to start within 3ms after power-up (see image).

"CH3" is the communication signal on the debug port, the UART is initialized after 3ms and the first debug character from the XLDR software is after 10ms.

According Freescale datasheet Reset delay is shorter than 100 ms,..... But here I measure 3 ms and this is a very short time to start and stabilize the XTAL oscillator...

 

On "CH2" we can see the oscillator is still running even at very low power supply ("CH1")

 

Marc

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MarcCoussement
Contributor I

hi,

 

In attachment a report with oscilloscope images.

Marc,

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Radist
Contributor II

Hi Marc,

 i made same steps, but did not found any issues here.

1)what is the state of your reset enable switch?

2)How did you set boot device?By resistors or via fuses?

Maybe you are in USB recovery mode? can you connect PCB to USB at this mode and check it?

Regards,

Sergii 

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MarcCoussement
Contributor I

Hi Andrew

  1. Ones it get stuck external reset is not working anymore, only stopping the XTAL oscillator will reset the system.
  2. I have no external supervisor connected, the design is on this point an exact copy of the eval. Kit. Before designing this product I was convinced that this is not necessary as the CPU has a build in watchdog and browout detection (BOR). I was also convinced that Freescale was doing a correct job in the software, after the numerous bugs that I found in the BSP I guess this idea was wrong :(.

 

I added some info to the serial debug port in the different steps of the XLDR. Just before it get stuck i have following strange effect. The last character coming out of the serial debug port is correct but the character just before is truncated. My guess is at that moment something is going wrong with the baud rate this will be related to the Xtal oscillator.

Now having this problem I am studying the datasheet of the power part of the CPU, and I found that a lot of options are possible with this part of the chip, at first glance it seems to be very complicated. I probably will end with the full study of how Freescale has done the initialization in XLDR and in WINCE to find a way around. As for an example I have found that there or 2 options for the external reset pin, full hardware reset or not full hardware reset. On has a lot of options on Browout detection and handling, my guess is that Freescale has made a mistake in the initialization.

I will do some measurements to see what is happing on the different power rails reset pin and so on.

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fear_nada
Contributor II

1.low level on RESET pin not helping?after stuck?

2.did you try use supervisor for hold reset pin in low state then "monitored voltage
(VIN) drops below the selected reset threshold (VRST). RESET
remains low as long as VIN is below VRST. Once VIN exceeds VRST,
RESET remains low for the reset timeout period and then goes high" 

i am use max6303\01  for supervisor and watchdog.

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