The conditions by which Persistent Bit of i.MX28 is reset

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The conditions by which Persistent Bit of i.MX28 is reset

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yuuki
Contributor V

Would you teach about the conditions by which Persistent Bit of iMX28 is reset?

Would you teach the power source to Persistent Bit?
(Is it powered from both Battery and VDD5V? )


I am referring to the following part.
http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf
- Figure 11-3. Power-Up, Power-Down, and Reset Flow Chart(P.953)

According to this Flow Chart, I understand that Persistent Bit is reset by POR when Battery is not connected.
And, I understand that Persistent Bit is powered from Battery.

However, on a custom board(without Battery), the value of HW_RTC_PERSISTENT5 is kept even after POR.

The interval from Power OFF to Power ON is about 2 seconds.
In this case, the voltage of 0.8V remained on VDD5V.

May I have advice?

Best Regards

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Yuri
NXP TechSupport
NXP TechSupport

  The persistent registers can be powered via battery, therefore to clear their content

it is needed to remove all power supply voltages (VDD5V, BATT) for relatively long time
(in order to avoid influence of residual voltage on capacitors). 


Have a great day,
Yuri

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Yuri
NXP TechSupport
NXP TechSupport

  The persistent registers can be powered via battery, therefore to clear their content

it is needed to remove all power supply voltages (VDD5V, BATT) for relatively long time
(in order to avoid influence of residual voltage on capacitors). 


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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