Hi Team, We are working on IXM8MM custom board. We are using tlv320aic3100 audio codec with imx8mm and Android 11 code base. Facing some issues related to MCLK. When I try to play audio, that time I can see 1.8V on MCLK, BCLK,WCLK lines (NO CLOCKS). if I change mclk to 49Mhz that time i can see clocks on I2S lines. In adb shell: evk_8mm:/sdcard # tinyplay LRMonoPhase4.wav Unable to open PCM device 0 (cannot set hw params: Invalid argument) LOGS: [ 939.481489] fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000 [ 939.488611] fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22 Same query I have raised with TI. they are saying this codec only supports 12 and 12.5Mhz freq.. but when I am setting it to 12 and 12.5 , we are not getting clock output. TI suggested that please connect with vendor host for clock related issue. Attaching all the details from TI case.
Hii @divyeshmarne0
There are lots of questions and issues regarding tlv320aic31xx chip.
can you share your complete patch here ?
i have checked your 3100.patch file but its not working for me.
it would be great if you share more info.
i am facing sound-card issue error.
Thanks
Hello,
I hope you are doing well. We are planing to use the same codec for our project. Were you able to solve the problem? Thank you in advance.
Best Regards.
Please find below update:
Measured all the clocks.
MCLK = 12.28 MHz
BCLK = 1.536 MHz
WCLK = 47.99 KHz
DIN = We can see data on DIN pin when we are playing audio file.
BUT SPEKER is not throwing any data . Not even noise.
Please help to update the clock freq table .
Please check attached logcat logs and dmesg logs :
all tinymix controls are off , Do you have any comment why DAC path is not enabled during boot time.
Latest changes:
--- a/sound/soc/codecs/tlv320aic31xx.c
+++ b/sound/soc/codecs/tlv320aic31xx.c
@@ -213,10 +213,12 @@ struct aic31xx_rate_divs {
/* 44.1k rate */
{12000000, 44100, 7, 5264, 128, 8, 2, 128, 8, 2},
{12000000, 44100, 8, 4672, 128, 6, 3, 128, 6, 3},
+ {12288000, 44100, 7, 5264, 128, 8, 2, 128, 8, 2},
{12500000, 44100, 7, 2253, 128, 8, 2, 128, 8, 2},
/* 48k rate */
{12000000, 48000, 8, 1920, 128, 8, 2, 128, 8, 2},
{12000000, 48000, 7, 6800, 96, 5, 4, 96, 5, 4},
+ {12288000, 48000, 8, 1920, 128, 8, 2, 128, 8, 2},
{12500000, 48000, 7, 8643, 128, 8, 2, 128, 8, 2},
/* 88.2k rate */
{12000000, 88200, 7, 5264, 64, 8, 2, 64, 8, 2},
Thanks
Divyesh.
Hi @divyeshmarne0 I have the same issue on clock can you please share your solution?
Hi Sabidi,
Are you using TLV320AIC3100 with imx8mm ?
I'm using Tlv320aic3254 with imx8mm
ok
I'm using tlv3245 with imx8mm
Thank you for your quick replay, i'am using imx8mm with tlv320aic3254 on yocto, kernel version 5.4.127 and in my file drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c i don't have static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[], also in the codec tlv320aic3254 there isn't struct aic31xx_rate_divs struct aic31xx_rate_divs struct aic31xx_rate_divs
any update?