Synchronous EIM ALSA data read iMXq

[abhijeet_ghodga]

Hi,

I am access FPGA connected over EIM interface in iMX6 chip attached with the SGTL5000 audio chip.

The EIM registers are configured as follows:

EIM_CS1GCR1 : 00633887

EIM_CS1GCR2 : 1

EIM_CS1RCR1 : 1C020000

EIM_CS1RCR2 : 0

EIM_CS1WCR1 : 804A240

EIM_CS1WCR2 : 0

When I tried to read from audio device holding the BCLK as reference (which is set as 125MHz/4 BCD=4 ), at its each rising edge and display it on the ILA of the FPGA, I do not get the signals.

I have referred to IMx6 reference manual, and Applications Processors for Consumer Products imx document to see the examples of EIM Synchronous burst mode. But I would like inputs for my specific problem statement of getting audio data to FPGA via Burst mode EIM.

Best,

Abhijeet

[Yuri]

Hello,

  Please let me know more details about the issue.

In particular - how FPGA, i.MX6 and SGTL5000 are connected

in system (schematic); and how it is planned to be used?

Regards,

Yuri.

[abhijeet_ghodga]

Hi Yuri,

The iMx6 is connected to the FPGA via an EIM bus, handshaking via the control and status EIM registers. (via the pins EIM_EB, EIM_LBA, EIM_OE and EIM_data lines)

The I2S connections between SGTL5000 and iMx6 are:

I2S_DIN to CODEC_AUD4TXD

I2S_DOUT to CODEC_AUD4RXD

I2S clock connections between SGTL5000 and iMx6,

I2S_LRCLK to CODEC_AUD4TXFS

I2S_SCLK to CODEC_AUD4TXC

I2C connections between SGTL5000 and iMx6,

CTRL_DATA to CODEC_I2C_SDA

CTRL_CLK to CODEC_I2C_SCL

DTRL_ADR0_CS to ARM_CODEC_SPI_CS

The plan of using the system, is to initiate BCLK at the start, and then read data from the ALSA driver, and store it in ping pong buffer, and then send it over to EIM FIFO, synchronously, and then loopback it out back to the speaker.

The

Best,

Abhijeet

[Yuri]

Hello,

   Can You try first asynchronous EIM access, using section "Typical Application" in EIM chapter

of i.MX6 RM ?  (in order to avoid clock issues.)

Regards,

Yuri.