Strange RS485 latency of disabling driver.

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Strange RS485 latency of disabling driver.

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3,410件の閲覧回数
sebastianpszczo
Contributor I

Good Morning,

We use kernel 4.1.15 NXP BSP and we have problem with RS485  latency. Sometimes we see that driver is disabled 900 us after last byte transmitted and it makes collision on bus. We have disabled DMA RX cause of poor performance of recieving small frame.

Can we increase interrupt priority in DTS for uart or it is another kind of problem? 

This code disable driver when interrupt: 

drivers/tty/serial/imx.c

static void imx_stop_tx(struct uart_port *port)
{
struct imx_port *sport = (struct imx_port *)port;
unsigned long temp;

/*
* We are maybe in the SMP context, so if the DMA TX thread is running
* on other cpu, we have to wait for it to finish.
*/
if (sport->dma_is_enabled && sport->dma_is_txing)
return;

temp = readl(port->membase + UCR1);
writel(temp & ~UCR1_TXMPTYEN, port->membase + UCR1);

/* in rs485 mode disable transmitter if shifter is empty */
if (port->rs485.flags & SER_RS485_ENABLED &&
readl(port->membase + USR2) & USR2_TXDC) {

if (sport->txen_gpio != -1) {
if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND){
gpio_set_value(sport->txen_gpio, 1);
}else
{
gpio_set_value(sport->txen_gpio, 0);
}
} else {
temp = readl(port->membase + UCR2);
if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
temp &= ~UCR2_CTS;
else
temp |= UCR2_CTS;
writel(temp, port->membase + UCR2);
}

/* disable shifter empty irq */
temp = readl(port->membase + UCR4);
temp &= ~UCR4_TCEN;
writel(temp, port->membase + UCR4);
}
}

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3,124件の閲覧回数
weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

    RS485 is a half duplex communication mode. The key to the design of UART to RS485 is how to control the direction of receiving and transmitting data.

    The above imx.c supports two control modes: GPIO or UART CTS.

For example, see circuit below, please!

pastedImage_2.png

---GPIO

You can use GPIO to control the level of DE/ RE# pin to determine whether data is received or sent on the bus.

This method is difficult to guarantee performance, because there must be necessary delay time between TX and RX.  This time is controlled by software. In fact, you can also use this GPIO to control IO direction in application layer software.

---UART_CTS

UART_CTS pin controls IO direction, which may have better performance than GPIO mode, but it also depends on software to determine when TX ends or RX ends. There is always a delay.

---Hardware controls IO direction

The following circuit is using UART_TXD's level feature to control IO directory automatically,No software is needed to control IO direction.

pastedImage_6.png

I hope the above explanation will help you!

Have a nice day!

BR,

Weidong

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3,039件の閲覧回数
apollo_chen
Contributor I

Dear Weidong,
I would like to know this circuit can work well with RS485. Becuase RS485 module's supply is 5V, and i.MX8MQ UART(TX/RX/RTS/CTS) is 3.3V.  And We find the voltage level is 4.75V on UART's pads. Could you please kindly help to check the circuit? Because we are facing timeout problem.

apollo_chen_0-1605237700036.png

 

Best regards,

Apollo

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3,125件の閲覧回数
weidong_sun
NXP TechSupport
NXP TechSupport

Hi,

    RS485 is a half duplex communication mode. The key to the design of UART to RS485 is how to control the direction of receiving and transmitting data.

    The above imx.c supports two control modes: GPIO or UART CTS.

For example, see circuit below, please!

pastedImage_2.png

---GPIO

You can use GPIO to control the level of DE/ RE# pin to determine whether data is received or sent on the bus.

This method is difficult to guarantee performance, because there must be necessary delay time between TX and RX.  This time is controlled by software. In fact, you can also use this GPIO to control IO direction in application layer software.

---UART_CTS

UART_CTS pin controls IO direction, which may have better performance than GPIO mode, but it also depends on software to determine when TX ends or RX ends. There is always a delay.

---Hardware controls IO direction

The following circuit is using UART_TXD's level feature to control IO directory automatically,No software is needed to control IO direction.

pastedImage_6.png

I hope the above explanation will help you!

Have a nice day!

BR,

Weidong

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3,124件の閲覧回数
sebastianpszczo
Contributor I

Thank You very much. I will use hardware solution but I am curious how to make driver on linux which can work in realtime? Thanks

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