Hello, I have a problem with my spi slave driver. The master sends 10 words, and in my test application I want to receive only 8 of them. When I run my test application I receive the 8 words correctly. But when I run the test the next times, I receive as first word the 9th word, and then the 1-2-3-4-5-6-7 words.Trying the test again, I receive 8-1-2-3-4-5-6-7, so the first word is always the next I should have received in the previous test.
After each transfer I reset the receive fifo, so I do not understand why I read the 9th word. Is it possible that I have to reset other registers?
I am using the board i.mx8qmlpddr4arm2 with Yocto.
Thank you for the answers!
I suggest you use the ECSPI test that we have in our Linux BSP. You can find it in the below path:
# cd /unit_tests/ECSPI
There we do have a spi example.
Hope this could help you.
Thank you for the answer. My board (i.mx8 quad max lpddr4 arm2) is using LPSPI. I think when I stop receiving, something remains in the shift register, and this is read in the next transfer. How can I clean the shift register? I am only able to reset the receive fifo, but not the entire shift register.
I apologize for the delay.
Unfortunately, the i.MX8QM is still in preproduction, we cannot support this product or guarantee anything since the information can be subject to change. I apologize for the inconveniences this could give you.