Specification of DRAM_SDCLK

[eishishibusawa]

Dear Sir

I want to confirm the specification of SDCLK for i.MX6Dual.

It is described at P5 in IMX6DQAEC Rev4 as following.

External memory interfaces:

　16-bit, 32-bit, and 64-bit DDR3-1066

I understand that it supports up to 533MHz as SDCLK.

I cannot find the minimum value for the SDCLK.

Q1.

What is the minimum value for SDCLK?

Q2.

Is it able to use DDR3-800(SDCLK=400MHz)?

Best Regards,

Eishi SHIBUSAWA

[Yuri]

Hello,

  Jedec specs provide data for the following configurations :

DDR3-800, DDR3-1066, DDR3-1333, DDR3-1600, DDR3-1866, DDR3-2133.

According to the specs Minimum Clock Cycle Time (DLL off mode) is 8 ns.

  So, DDR3-800 is minimal frequency configuration from the recommended ones.

It is supported by i.MX6, assuming timing parameters should be set for 400 MHz. 

Have a great day,
Yuri

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