SoloX RMII ENET1_REF_CLK Jitter

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SoloX RMII ENET1_REF_CLK Jitter

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scottgauche
Contributor I


Hi,


Is there a way to determine the jitter specifications of the ENET1_REF_CLK for a RMII interface?

Thanks,

Scott

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art
NXP Employee
NXP Employee

For the RMII interface, the reference clock should be 50MHz +/- 50ppm.


Have a great day,
Artur

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scottgauche
Contributor I

We are using a 24 MHz +/- 30 ppm crystal for the SoloX XTAL.  Similar to what is used on the SoloX Sabre board.  But that is the frequency tolerance, we are looking for a way to figure out if there is a jitter specification for what the SoloX is able to output for the 50 MHz RMII clock to the PHY.

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art
NXP Employee
NXP Employee

No, there is no strict jitter specification for this clock. The meaning is that any frequency fluctuation of the clock must remain within this 50MHz +/- 50ppm range.

Artur

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